MAX118CAI+T Maxim Integrated Products, MAX118CAI+T Datasheet - Page 11

IC ADC 8BIT 1MSPS 28-SSOP

MAX118CAI+T

Manufacturer Part Number
MAX118CAI+T
Description
IC ADC 8BIT 1MSPS 28-SSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX118CAI+T

Number Of Bits
8
Sampling Rate (per Second)
1M
Data Interface
Parallel
Number Of Converters
3
Power Dissipation (max)
762mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 10 shows the MAX114/MAX118’s nominal trans-
fer function. Code transitions occur halfway between
successive-integer LSB values. Output coding is binary
with 1LSB = (V
The maximum sampling rate (f
MAX118 is achieved in write-read mode (t
and is calculated as follows:
where t
between write and read pulses, t
and t
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to all
other ADC output signals. The output spectrum is limit-
ed to frequencies above DC and below one-half the
ADC sample rate.
The theoretical minimum analog-to-digital noise is
caused by quantization error, and results directly from
the ADC’s resolution: SNR = (6.02N + 1.76)dB, where
N is the number of bits of resolution. Therefore, a per-
fect 8-bit ADC can do no better than 50dB.
The FFT Plot (see Typical Operating Characteristics )
shows the result of sampling a pure 195.8kHz sinusoid
at a 1MHz rate. This FFT plot of the output shows the
output level in various spectral bands.
The effective resolution (or “effective number of bits”)
the ADC provides can be measured by transposing the
equation that converts resolution to SNR: N = (SINAD -
1.76) / 6.02 (see Typical Operating Characteristics ).
Total harmonic distortion (THD) is the ratio of the RMS
sum of all harmonics of the input signal (in the frequency
ACQ
f
f
f
MAX
MAX
MAX
WR
= minimum acquisition time.
=
= the write pulse width, t
t
WR
250ns
1.23MHz
REF+
______________________________________________________________________________________
+ t
- V
RD
Total Harmonic Distortion
Signal-to-Noise Ratio and
REF-
Effective Number of Bits
250ns
+ t
1
) / 256.
RI
+ t
1
MAX
RI
150ns
Conversion Rate
ACQ
8-Bit ADCs with 1µA Power-Down
= RD to INT delay,
Transfer Function
) for the MAX114/
RD
= the delay
RD
160ns
< t
INTL
+5V, 1Msps, 4 & 8-Channel,
),
band above DC and below one-half the sample rate) to
the fundamental itself. This is expressed as:
where V
through V
harmonics.
Spurious-free dynamic range (SFDR) is the ratio of the
fundamental RMS amplitude to the amplitude of the
next largest spectral component (in the frequency
band above DC and below one-half the sample rate).
Usually the next largest spectral component occurs at
some harmonic of the input frequency. However, if the
ADC is exceptionally linear, it may occur only at a ran-
dom peak in the ADC’s noise floor. See the Signal-to-
Noise Ratio graph in Typical Operating Characteristics .
Figure 10. Transfer Function
V
REF-
00000011
00000010
00000001
00000000
11111111
11111110
11111101
OUTPUT CODE
THD = 20log
1
N
is the fundamental RMS amplitude, and V
1
are the amplitudes of the 2nd through Nth
2
Spurious-Free Dynamic Range
3
INPUT VOLTAGE (LSBs)
V
2
2
FULL-SCALE
TRANSITION
V
3
2
V
1
V
4
1LSB =
2
FS - 1LSB
...V
V
REF+
N
2
256
FS
- V
REF-
V
REF+
11
2

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