MAX1183ECM+TD Maxim Integrated Products, MAX1183ECM+TD Datasheet - Page 13

• Manufacturer Part Number: MAX1183ECM+TD
• Description: IC ADC 10BIT 40MSPS DL 48-TQFP
• Manufacturer: Maxim Integrated Products

Specifications of MAX1183ECM+TD

• Number Of Bits: 10
• Sampling Rate (per Second): 40M
• Data Interface: Parallel
• Number Of Converters: 2
• Power Dissipation (max): 180mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 4. Output Timing Diagram
Figure 4 displays the timing relationship between output
enable and data output valid, as well as power-
down/wake-up and data output valid.
The MAX1183 offers two power-save modes—sleep and
full power-down modes. In sleep mode (SLEEP = 1), only
the reference bias circuit is active (both ADCs are
disabled), and current consumption is reduced to 2.8mA.
To enter full power-down mode, pull PD high. With OE
simultaneously low, all outputs are latched at the last
value prior to the power down. Pulling OE high forces
the digital outputs into a high-impedance state.
Figure 5 depicts a typical application circuit containing
two single-ended to differential converters. The internal
reference provides a V
shifting purposes. The input is buffered and then split
to a voltage follower and inverter. One lowpass filter per
ADC suppresses some of the wideband noise associat-
ed with high-speed op amps follows the amplifiers. The
user may select the R
the filter performance, to suit a particular application.
Table 1. MAX1183 Output Codes for Differential Inputs
*V
D9A–D0A
D9B–D0B
REF
OUTPUT
OUTPUT
DIFFERENTIAL INPUT
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
= V
OE
-V
-V
V
- V
REFP
V
REF
VOLTAGE*
REF
REF
REF
REF
x 511/512
x 512/512
x 512/512
HIGH-Z
HIGH-Z
- V
x 1/512
0
x 1/512
Applications Information
REFN
t
ENABLE
______________________________________________________________________________________
Internal Reference and Parallel Outputs
Power-Down (PD) and Sleep
ISO
DD
and C
/2 output voltage for level-
VALID DATA
VALID DATA
DIFFERENTIAL INPUT
+FULL SCALE - 1LSB
t
IN
-FULL SCALE +1LSB
DISABLE
(SLEEP) Modes
values to optimize
-FULL SCALE
Bipolar Zero
+ 1LSB
- 1LSB
HIGH-Z
HIGH-Z
STRAIGHT OFFSET BINARY
For the application in Figure 5, a R
before the capacitive load to prevent ringing and
oscillation. The 22pF C
bypassing capacitor.
An RF transformer (Figure 6) provides an excellent solu-
tion to convert a single-ended source signal to a fully dif-
ferential signal, required by the MAX1183 for optimum
performance. Connecting the center tap of the trans-
former to COM provides a V
input. Although a 1:1 transformer is shown, a step-up
transformer may be selected to reduce the drive require-
ments. A reduced signal swing from the input driver, such
as an op amp, may also improve the overall distortion.
In general, the MAX1183 provides better SFDR and
THD with fully differential input signals than single-
ended drive, especially for very high input frequencies.
In differential input mode, even-order harmonics are
lower as both inputs (INA+, INA- and/or INB+, INB-) are
balanced, and each of the ADC inputs only requires
half the signal swing compared to single-ended mode.
Figure 7 shows an AC-coupled, single-ended applica-
tion. Amplifiers like the MAX4108 provide high speed,
high bandwidth, low noise, and low distortion to main-
tain the integrity of the input signal.
The most frequently used modulation technique for dig-
ital communications applications is probably the quad-
rature amplitude modulation (QAM). Typically found in
spread-spectrum-based systems, a QAM signal repre-
sents a carrier frequency modulated in both amplitude
and phase. At the transmitter, modulating the base-
band signal with quadrature outputs, a local oscillator
followed by subsequent up-conversion can generate
the QAM signal. The result is an in-phase (I) and
a quadrature (Q) carrier component, where the Q
Typical QAM Demodulation Application
11 1111 1111
10 0000 0001
10 0000 0000
01 1111 1111
00 0000 0001
00 0000 0000
Single-Ended AC-Coupled Input Signal
T/B = 0
Using Transformer Coupling
IN
capacitor acts as a small
DD
TWO'S COMPLEMENT
/2 DC level shift to the
ISO
01 1111 1111
00 0000 0001
00 0000 0000
11 1111 1111
10 0000 0001
10 0000 0000
T/B = 1
of 50Ω is placed
13