AD7885BQ Analog Devices Inc, AD7885BQ Datasheet - Page 3

• Manufacturer Part Number: AD7885BQ
• Description: IC ADC 16BIT SAMPLING HS 28-CDIP
• Manufacturer: Analog Devices Inc

Specifications of AD7885BQ

• Rohs Status: RoHS non-compliant
• Number Of Bits: 16
• Sampling Rate (per Second): 166k
• Data Interface: Parallel
• Number Of Converters: 2
• Power Dissipation (max): 325mW
• Voltage Supply Source: Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 28-CDIP (0.600", 15.24mm)

TIMING CHARACTERISTICS
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
NOTES
1
2
3
Specifications subject to change without notice.
REV. D
Sample tested at 25°C to ensure compliance. All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
t
t
1
2
3
4
5
6
7
8
9
10
11
12
13
14
extrapolated back to remove the effects of charging or discharging the 100 pF capacitor. This means that the time, t
is the true bus relinquish time of the part and as such is independent of external bus loading capacitances.
6
7
2
3
is measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.
is derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then
Limit at 25 C
(All Versions)
50
100
0
60
0
57
5
50
40
10
25
60
60
55
55
Limit at T
(A, B, and J Versions) Unit
50
100
0
60
0
57
5
50
40
80
25
60
60
70
70
1
(V
Figure 1. Load Circuit for Access Time and Bus
Relinquish Time
DD
TO OUTPUT PIN
= +5 V
MIN
, T
MAX
5%, V
100pF
C
L
SS
= –5 V
ns min
ns max
ns min
ns min
ns min
ns max
ns min
ns max
ns min
ns min
ns min
ns min
ns min
ns max
ns max
–3–
200 A
1.6mA
I
5%, AGND = DGND = GND = 0 V. See Figures 2, 3, 4, and 5.)
I
OL
OH
Conditions/Comments
CONVST Pulsewidth
CONVST to BUSY Low Delay
CS to RD Setup Time
RD Pulsewidth
CS to RD Hold Time
Data Access Time after RD
Bus Relinquish Time after RD
New Data Valid before Rising Edge of BUSY
HBEN to RD Setup Time
HBEN to RD Hold Time
HBEN Low Pulse Duration
HBEN High Pulse Duration
Propagation Delay from HBEN Falling to Data Valid
Propagation Delay from HBEN Rising to Data Valid
2.1V
7
, quoted in the Timing Characteristics
AD7884/AD7885