CS5014-BL14Z Cirrus Logic Inc, CS5014-BL14Z Datasheet - Page 19

• Manufacturer Part Number: CS5014-BL14Z
• Description: IC ADC 14BIT SELF-CALBR 44-PLCC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5014-BL14Z

• Number Of Bits: 14
• Sampling Rate (per Second): 56k
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 250mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1075-5

peaking in its output impedance characteristic at
signal frequencies or their harmonics.
A large capacitor connected between VREF and
AGND can provide sufficiently low output im-
pedance at the high end of the frequency
spectrum, while almost all precision references
exhibit extremely low output impedance at dc.
The magnitude of the current load on the external
reference circuitry will scale to the CLKIN fre-
quency. At full speed, the reference must supply a
maximum load current of 10
(1
pedance of 15 Ω will therefore yield a maximum
error of 150 mV. With a 2.5V reference and LSB
size of 600 mV, this would insure better than 1/4
LSB accuracy. A 1
DS14F8
DS14F9
CLKIN
EOC
Status
EOT
HOLD
SCLK
SDATA
CS5012A:
CS5016:
CS5014:
µ
A typical). For the CS5012A an output im-
Notes: 1. Synchronous (loopback) mode is illustrated. After EOC falls the converter goes into coarse charge mode for
2. Timing delay t
3. EOC returns high in 4 CLKIN cycles if A0 = 1 and CS = RD = 0 (Microprocessor Independent Mode);
LSB+2
60
52
44
6 CLKIN cycles, then to fine charge mode for 9 cycles, then EOT falls. In loopback mode, EOT trips HOLD
which captures the analog sample. Conversion begins on the next rising edge of CLKIN. If operated asynchro-
nously, EOT will remain low until after HOLD is taken low. When HOLD occurs the analog sample is captured
immediately, but conversion may not begin until four CLKIN cycles later. EOT will return high
when conversion begins.
and over ± 10% supply variation
within 4 CLKIN cycles after a data read (Microprocessor Mode); or 4 CLKIN cycles after HOLD = 0
is recognized on a rising edge of CLKIN/4.
Determined
t
d
LSB
62
54
46
µ
LSB+1
F capacitor exhibits an im-
64
56
48
d
Coarse Charge
(relative to CLKIN) can vary between 135 ns to 235 ns over the military temperature range
66
58
50
µ
LSB
68
60
52
A peak-to-peak
Figure 9. Serial Output Timing
70
62
54
72
64
56
Fine Charge
74
66
58
pedance of less than 15 Ω at frequencies greater
than 10 kHz. Similarly, for the CS5014 with a
4.5V reference (275µV/LSB), better than
1/4 LSB accuracy can be insured with an output
impedance of 4Ω or less (maximum error of
40 µV). A 2.2 µF capacitor exhibits an imped-
ance of less than 4Ω at frequencies greater than
5kHz. For the CS5016 with a 4.5V reference
(69µV/LSB), better than 1/4 LSB accuracy can
be insured with an output impedance of less than
2Ω (maximum error of 20 µV). A 20 µF capaci-
tor exhibits an impedance of less than 2Ω at
frequencies greater than 16 kHz. A high-quality
tantalum capacitor in parallel with a smaller ce-
ramic capacitor is recommended.
76
68
60
t
d
78
70
62
CS5012A CS5014 CS5016
80/0
72/0
64/0
Determined
MSB
2
2
2
CS5012A, CS5014, CS5016
4
4
4
Determined
MSB - 1
6
6
6
MSB
8
8
8
Determined
MSB - 2
10
10
10
MSB - 1
12
12
12
2-25
19