AD7621AST Analog Devices Inc, AD7621AST Datasheet
AD7621AST
Specifications of AD7621AST
Available stocks
Related parts for AD7621AST
AD7621AST Summary of contents
Page 1
FEATURES Throughput 3 MSPS (wideband warp and warp mode) 2 MSPS (normal mode) 1.25 MSPS (impulse mode) 2.048 V internal reference Differential input range: ± 2.5 V) REF REF INL: ±2 LSB maximum, ±1 LSB typical 16-bit ...
Page 2
AD7621 TABLE OF CONTENTS Specifications..................................................................................... 3 Timing Specifications....................................................................... 5 Serial Clock Timing Specifications ............................................ 6 Absolute Maximum Ratings............................................................ 7 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. 8 Terminology .................................................................................... 11 Typical Performance Characteristics ........................................... 12 Theory of Operation ...................................................................... ...
Page 3
SPECIFICATIONS AVDD = DVDD = 2.5 V; OVDD = 2 3 Table 2. Parameter RESOLUTION ANALOG INPUT Voltage Range Operating Input Voltage Analog Input CMRR Input Current 2 Input Impedance THROUGHPUT SPEED Complete Cycle Throughput Rate ...
Page 4
AD7621 Parameter Turn-On Settling Time REFBUFIN Output Voltage REFBUFIN Output Resistance EXTERNAL REFERENCE Voltage Range Current Drain REFERENCE BUFFER REFBUFIN Input Voltage Range TEMPERATURE PIN Voltage Output Temperature Sensitivity Output Resistance DIGITAL INPUTS Logic Levels ...
Page 5
TIMING SPECIFICATIONS AVDD = DVDD = 2.5 V; OVDD = 2 3 Table 3. Parameter CONVERSION AND RESET (Refer to Figure 31 and Figure 32) Convert Pulse Width 2 Time Between Conversions (Warp Mode/Normal Mode/Impulse Mode) ...
Page 6
AD7621 Parameter 5 SLAVE SERIAL INTERFACE MODES (Refer to Figure 40 and Figure 41) External SCLK Setup Time External SCLK Active Edge to SDOUT Delay SDIN Setup Time SDIN Hold Time External SCLK Period External SCLK High External SCLK Low ...
Page 7
ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Rating Analog Inputs/Outputs 1 IN+ , IN−, REF, REFBUFIN, TEMP, AVDD + 0 INGND, REFGND to AGND AGND − 0.3 V Ground Voltage Differences AGND, DGND, OGND ±0.3 V Supply Voltages AVDD, ...
Page 8
AD7621 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 6. Pin Function Descriptions 1 Pin No. Mnemonic Type Description 1, 41, 42 AGND P Analog Power Ground Pin AVDD P Input Analog Power Pins. Nominally 2 ...
Page 9
Pin No. Mnemonic Type Description 14 D5 DI/O When SER/PAR = low this output is used as Bit 5 of the parallel port data output bus. or INVSYNC When SER/PAR = high, invert sync select. In serial master mode ...
Page 10
AD7621 1 Pin No. Mnemonic Type Description Chip Select. When CS and RD are both low, the interface parallel or serial output bus is enabled also used to gate the external clock in slave serial ...
Page 11
TERMINOLOGY Integral Nonlinearity Error (INL) Linearity error refers to the deviation of each individual code from a line drawn from negative full-scale through positive full- scale. The point used as negative full-scale occurs ½ LSB before the first code transition. ...
Page 12
AD7621 TYPICAL PERFORMANCE CHARACTERISTICS 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0 16384 32768 CODE Figure 5. Integral Nonlinearity vs. Code 160000 149969 140000 120000 100000 80000 54791 60000 51847 40000 20000 2080 7FFC 7FFD ...
Page 13
FREQUENCY (kHz) Figure 11. FFT 20 kHz SINAD 85 ...
Page 14
AD7621 91.0 SNR 90.5 SINAD 90.0 89.5 –60 –50 –40 –30 INPUT LEVEL (dB) Figure 17. SNR and SINAD vs. Input Level (Referred to Full Scale AVDD –55 –35 –15 5 ...
Page 15
THEORY OF OPERATION IN+ MSB 32,768C 16,384C REF REFGND 32,768C 16,384C MSB IN– CIRCUIT INFORMATION The AD7621 is a very fast, low power, single-supply, precise, 16-bit analog-to-digital converter (ADC) using successive approximation architecture. The AD7621 features different modes to optimize ...
Page 16
AD7621 TRANSFER FUNCTIONS Using the OB/ 2C digital input, the AD7621 offers two output codings: straight binary and twos complement. The LSB size with V = 2.048 × V /65536, which is 62.5 μV. Refer to REF ...
Page 17
TYPICAL CONNECTION DIAGRAM Figure 23 shows a typical connection diagram for the AD7621. Different circuitry from that shown in this diagram are optional and are discussed below. ANALOG INPUTS Figure 24 shows an equivalent circuit of the input structure of ...
Page 18
AD7621 coming from the driver is filtered by the AD7621 analog input circuit one-pole, low-pass filter made the external filter, if one is used. The SNR degradation due to the amplifier is ⎛ ⎜ = SNR ...
Page 19
External Reference (PDBUF = High, PRBUF = High) To use an external reference directly on the REF pin, PDREF and PDBUF should both be high. For improved drift performance, an external reference, such as the AD780 or ADR431, can be ...
Page 20
AD7621 Power-Up At power-up, or returning to operational mode from the power- down mode (PD = high), the AD7621 engages an initialization process. During this time, the first 128 conversions should be ignored or the RESET input could be pulsed ...
Page 21
INTERFACES DIGITAL INTERFACE The AD7621 has a versatile digital interface that can be set up as either a serial or parallel interface with the host system. The serial interface is multiplexed on the parallel data bus. The AD7621 digital interface ...
Page 22
AD7621 CNVST BUSY DATA PREVIOUS BUS CONVERSION Figure 35. Slave Parallel Data Timing for Reading (Read During Convert) 8-Bit Interface (Master or Slave) The BYTESWAP pin allows ...
Page 23
EXT/INT = 0 CS CNVST BUSY t 29 SYNC t 14 SCLK t 15 SDOUT Figure 37. Master Serial Data Timing for Reading (Read After Convert) EXT/INT = 0 CS ...
Page 24
AD7621 SLAVE SERIAL INTERFACE External Clock The AD7621 is configured to accept an externally supplied serial data clock on the SCLK pin when the EXT/ INT pin is held high. In this mode, several methods can be used to read ...
Page 25
CS BUSY SCLK D15 SDOUT SDIN X15 t 33 Figure 40. Slave Serial Data Timing for Reading (Read After Convert) CS CNVST BUSY ...
Page 26
AD7621 MICROPROCESSOR INTERFACING The AD7621 is ideally suited for traditional dc measurement applications supporting a microprocessor, and ac signal processing applications interfacing to a digital signal processor. The AD7621 is designed to interface with a parallel 8-bit or 16-bit wide ...
Page 27
APPLICATION LAYOUT While the AD7621 has very good immunity to noise on the power supplies, exercise care with the grounding layout. To facilitate the use of ground planes that can be easily separated, design the printed circuit board that houses ...
Page 28
AD7621 OUTLINE DIMENSIONS 1.45 1.40 1.35 0.15 0.05 VIEW A ROTATED 90° CCW 7.00 BSC SQ PIN 1 INDICATOR TOP VIEW 1.00 12° MAX 0.85 0.80 SEATING PLANE 0.75 1.60 0.60 MAX 0.45 0.20 0.09 7° 3.5° 12 0° SEATING ...
Page 29
... AD7621ACPZRL −40°C to +85°C AD7621AST −40°C to +85°C AD7621ASTRL −40°C to +85°C 1 AD7621ASTZ −40°C to +85°C AD7621ASTZRL 1 −40°C to +85°C 2 EVAL-AD7621CB 3 EVAL-CONTROLBRD3 Pb-free part. 2 This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD3 for evaluation/demonstration purposes. ...
Page 30
AD7621 NOTES Rev Page ...
Page 31
NOTES Rev Page AD7621 ...
Page 32
AD7621 NOTES ©2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04565–0–5/05(0) Rev Page ...