AD7623AST Analog Devices Inc, AD7623AST Datasheet
AD7623AST
Specifications of AD7623AST
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AD7623AST Summary of contents
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FEATURES Throughput: 1.33 MSPS 2.048 V internal reference Differential input range: ± 2.5 V) REF REF INL: ±1 LSB typical 16-bit resolution with no missing codes SINAD typical @ 100 kHz THD: −97 dB typical ...
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AD7623 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Specifications..................................................................................... 3 Timing Specifications....................................................................... 5 Serial Clock Timing Specifications ............................................ 6 Absolute Maximum Ratings............................................................ 7 ESD Caution.................................................................................. 7 ...
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SPECIFICATIONS AVDD = DVDD = 2.5 V; OVDD = 2 3 Table 2. Parameter RESOLUTION ANALOG INPUT Voltage Range Operating Input Voltage Analog Input CMRR Input Current 2 Input Impedance THROUGHPUT SPEED Complete Cycle Throughput Rate ...
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AD7623 Parameter EXTERNAL REFERENCE Voltage Range Current Drain REFERENCE BUFFER REFBUFIN Input Voltage Range TEMPERATURE PIN Voltage Output Temperature Sensitivity Output Resistance DIGITAL INPUTS Logic Levels DIGITAL OUTPUTS Data Format 7 8 ...
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TIMING SPECIFICATIONS AVDD = DVDD = 2.5 V; OVDD = 2 3 Table 3. Parameter CONVERSION AND RESET (Refer to Figure 31 and Figure 32) Convert Pulse Width Time Between Conversions CNVST Low to BUSY High ...
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AD7623 SERIAL CLOCK TIMING SPECIFICATIONS Table 4. Serial Clock Timings in Master Read After Convert Mode DIVSCLK[1] DIVSCLK[0] SYNC to SCLK First Edge Delay Minimum Internal SCLK Period Minimum Internal SCLK Period Maximum Internal SCLK High Minimum Internal SCLK Low ...
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ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Rating Analog Inputs/Outputs 1 IN+ , IN−, REF, REFBUFIN, TEMP, AVDD + 0 INGND, REFGND to AGND AGND − 0.3 V Ground Voltage Differences AGND, DGND, OGND ±0.3 V Supply Voltages AVDD, ...
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AD7623 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 6. Pin Function Descriptions Pin No. Mnemonic Type 1 Description 1, 41, 42 AGND P Analog Power Ground Pin AVDD P Input Analog Power Pins. Nominally 2 ...
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Pin No. Mnemonic Type Description 16 D7 DI/O Bit 7 of the Parallel Port Data Output Bus. or RDC When SER/PAR = high, read during convert. When using serial master mode (EXT/INT = low), RDC is used to select ...
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AD7623 1 Pin No. Mnemonic Type Description 35 CNVST DI Conversion Start. A falling edge on CNVST puts the internal sample-and-hold into the hold state and initiates a conversion. 36 AGND P Analog Power Ground Pin. 37 REF AI/O Reference ...
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TERMINOLOGY Integral Nonlinearity Error (INL) Linearity error refers to the deviation of each individual code from a line drawn from negative full-scale through positive full- scale. The point used as negative full-scale occurs ½ LSB before the first code transition. ...
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AD7623 TYPICAL PERFORMANCE CHARACTERISTICS 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0 16384 32768 CODE Figure 5. Integral Nonlinearity vs. Code 160k 147157 140k 120k 100k 80k 58814 60k 50472 40k 20k 2406 7FFC 7FFD ...
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FREQUENCY (kHz) Figure 11. FFT 20 kHz 92 90 SNR SINAD 88 ENOB 100 FREQUENCY (kHz) Figure 12. SNR, SINAD ...
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AD7623 91.0 90.5 SNR SINAD 90.0 89.5 89.0 –60 –50 –40 –30 INPUT LEVEL (dB) Figure 17. SNR and SINAD vs. Input Level (Referred to Full Scale AVDD –55 –35 –15 ...
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THEORY OF OPERATION IN+ MSB 32,768C 16,384C REF REFGND 32,768C 16,384C MSB IN– CIRCUIT INFORMATION The AD7623 is a very fast, low power, single-supply, precise, 16-bit analog-to-digital converter (ADC) using successive approximation architecture. The AD7623 is capable of converting 1,330,000 ...
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AD7623 TRANSFER FUNCTIONS Using the OB/ 2C digital input, the AD7623 offers two output codings: straight binary and twos complement. The LSB size with V = 2.048 × V /65536, which is 62.5 μV. Refer to REF ...
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TYPICAL CONNECTION DIAGRAM Figure 23 shows a typical connection diagram for the AD7623. Different circuitry from that shown in this diagram are optional and are discussed in the Analog Inputs section. ANALOG INPUTS Figure 24 shows an equivalent circuit of ...
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AD7623 one-pole, low-pass filter made by R external filter, if one is used. The SNR degradation due to the amplifier is ⎛ ⎜ SNR 20 log ⎜ ⎜ LOSS + π 2809 f ⎝ where the ...
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External Reference (PDBUF = High, PRBUF = High) To use an external reference directly on the REF pin, PDREF and PDBUF should both be high. PDREF and PDBUF power down the internal reference and the internal reference buffer, respectively. For ...
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AD7623 Power-Up At power-up, or returning to operational mode from the power- down mode (PD = high), the AD7623 engages an initialization process. During this time, the first 128 conversions should be ignored or the RESET input could be pulsed ...
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INTERFACES DIGITAL INTERFACE The AD7623 has a versatile digital interface that can be set up as either a serial or parallel interface with the host system. The serial interface is multiplexed on the parallel data bus. The AD7623 digital interface ...
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AD7623 CNVST BUSY DATA PREVIOUS BUS CONVERSION Figure 35. Slave Parallel Data Timing for Reading (Read During Convert) 8-Bit Interface (Master or Slave) The BYTESWAP pin ...
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EXT/INT = 0 CS CNVST BUSY t 29 SYNC SCLK t 15 SDOUT D15 Figure 37. Master Serial Data Timing for Reading (Read After Convert) EXT/INT = 0 ...
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AD7623 SLAVE SERIAL INTERFACE External Clock The AD7623 is configured to accept an externally supplied serial data clock on the SCLK pin when the EXT/ INT pin is held high. In this mode, several methods can be used to read ...
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EXT/INT = 1 CS BUSY SCLK D15 D14 SDOUT SDIN X15 X14 t 33 Figure 40. Slave Serial Data Timing for Reading ...
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AD7623 MICROPROCESSOR INTERFACING The AD7623 is ideally suited for traditional dc measurement applications supporting a microprocessor, and ac signal processing applications interfacing to a digital signal processor. The AD7623 is designed to interface with a parallel 8-bit or 16-bit wide ...
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APPLICATION LAYOUT While the AD7623 has very good immunity to noise on the power supplies, exercise care with the grounding layout. To facilitate the use of ground planes that can be easily separated, design the printed circuit board that houses ...
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... AD7623AST −40°C to +85°C AD7623ASTRL −40°C to +85°C 1 AD7623ASTZ −40°C to +85°C 1 AD7623ASTZRL −40°C to +85°C 2 EVAL-AD7623CB 3 EVAL-CONTROL BRD3 Pb-free part. 2 This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD3 for evaluation/demonstration purposes. ...