MAX1271ACNG+ Maxim Integrated Products, MAX1271ACNG+ Datasheet - Page 8

• Manufacturer Part Number: MAX1271ACNG+
• Description: IC ADC 12BIT 8CH 24-DIP
• Manufacturer: Maxim Integrated Products
• Type: Data Acquisition System (DAS)r

Specifications of MAX1271ACNG+

• Resolution (bits): 12 b
• Sampling Rate (per Second): 110k
• Data Interface: Serial
• Voltage Supply Source: Single Supply
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 24-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Multirange, +5V, 8-Channel,
Serial 12-Bit ADCs
8
(Typical Operating Circuit, V
110ksps; T
22, 24
13–20 15–21, 23 CH0–CH7 Analog Input Channels
PDIP
3, 9,
2, 4
10
11
12
21
23
1
5
6
7
8
_______________________________________________________________________________________
PIN
24, 25, 28
4, 7, 8,
11, 22,
SSOP
A
2, 3
10
12
13
14
26
27
= +25°C, unless otherwise noted.)
1
5
6
9
8
7
6
5
4
3
2
1
0
0.1
CONVERSION RATE (USING STANDBY)
V
f
EXTERNAL CLOCK MODE.
LOW-RANGE UNIPOLAR MODE.
V
CLK
DD
CH_
REFADJ
AVERAGE SUPPLY CURRENT vs.
SSTRB
NAME
DGND
AGND
= 5V, INTERNAL REFERENCE,
= 2MHz
DOUT
SHDN
SCLK
= 0
N.C.
V
REF
DIN
CS
DD
1
CONVERSION RATE (ksps)
DD
+5V Supply. Bypass with a 0.1µF capacitor to AGND.
Digital Ground
No Connection. No internal connection.
Serial Clock Input. Clocks data in and out of serial interface. In external clock mode, SCLK also
sets the conversion speed.
Active-Low Chip-Select Input. Data is not clocked into DIN unless CS is low. When CS is high,
DOUT is high impedance.
Serial Data Input. Data is clocked in on the rising edge of SCLK.
Serial Strobe Output. In internal clock mode, SSTRB goes low after the falling edge of the eighth
SCLK and returns high when the conversion is done. In external clock mode, SSTRB pulses high
for one clock period before the MSB decision. High impedance when CS is high in external
clock mode.
Serial Data Output. Data is clocked out on the falling edge of SCLK. High impedance when CS is
high.
Shutdown Input. When low, device is in FULLPD mode. Connect high for normal operation.
Analog Ground
Bandgap Voltage-Reference Output/External Adjust Pin. Bypass with a 0.01µF capacitor to AGND.
Connect to V
Refer ence- Buffer O utp ut/AD C Refer ence Inp ut. In i nter nal r efer ence m od e, the r efer ence b uffer
p r ovi d es a 4.096V nom i nal outp ut, exter nal l y ad j ustab l e to RE FAD J. In exter nal r efer ence m od e,
d i sab l e the i nter nal r efer ence b y p ul l i ng RE FAD J to V
= +5V; external reference mode, V
10
100
DD
Typical Operating Characteristics (continued)
when using an external reference at REF.
1000
REF
= +4.096V; 4.7µF at REF; external clock, f
FUNCTION
D D
8
7
6
5
4
3
2
1
0
0.1
and ap p l yi ng the exter nal r efer ence to RE F.
V
f
EXTERNAL CLOCK MODE.
LOW-RANGE UNIPOLAR MODE.
V
CLK
CONVERSION RATE (USING FULLPD)
DD
CH_
AVERAGE SUPPLY CURRENT vs.
= 5V, INTERNAL REFERENCE,
= 2MHz
= 0
1
CONVERSION RATE (ksps)
10
Pin Description
100
CLK
1000
= 2MHz;