AD5241BRZ10 Analog Devices Inc, AD5241BRZ10 Datasheet - Page 12

• Manufacturer Part Number: AD5241BRZ10
• Description: IC POT DGTL SGL 256POS 14-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD5241BRZ10

• Taps: 256
• Resistance (ohms): 10K
• Number Of Circuits: 1
• Temperature Coefficient: 30 ppm/°C Typical
• Memory Type: Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V, ±2.3 V ~ 2.7 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Resistance In Ohms: 10K
• End To End Resistance: 10kohm
• No. Of Steps: 256
• Resistance Tolerance: ± 30%
• Supply Voltage Range: 2.7V To 5.5V, ± 2.3V To ± 2.7V
• Control Interface: I2C, Serial
• No. Of Pots: Single
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5241/AD5242
THEORY OF OPERATION
The AD5241/AD5242 provide a single-/dual-channel, 256-
position digitally controlled variable resistor (VR) device. The
terms VR, RDAC, and programmable resistor are commonly
used interchangeably to refer to digital potentiometer.
To program the VR settings, refer to the Digital Interface section.
Both parts have an internal power-on preset that places the wiper
in midscale during power-on that simplifies the fault condition
recovery at power-up. In addition, the shutdown pin ( SHDN )
of AD5241/AD5242 places the RDAC in an almost zero power
consumption state where Terminal A is open circuited and Wiper
W is connected to Terminal B, resulting in only leakage current
being consumed in the VR structure. During shutdown, the VR
latch contents are maintained when the RDAC is inactive. When
the part returns from shutdown, the stored VR setting is applied
to the RDAC.
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation
The nominal resistance of the RDAC between Terminal A and
Terminal B is available in 10 kΩ, 100 kΩ, and 1 MΩ. The final two
or three digits of the part number determine the nominal resistance
value, for example, 10 kΩ = 10, 100 kΩ = 100, and 1 MΩ = 1 M.
The nominal resistance (R
accessed by the wiper terminal, plus the B terminal contact. The
8-bit data in the RDAC latch is decoded to select one of the 256
possible settings. Assume a 10 kΩ part is used; the first connection
of the wiper starts at the B terminal for Data 0x00. Because there is
a 60 Ω wiper contact resistance, such connection yields a minimum
of 60 Ω resistance between Terminal W and Terminal B. The
second connection is the first tap point that corresponds to 99 Ω
(R
is the next tap point representing 138 Ω (39 × 2 + 60) for Data 0x02,
and so on. Each LSB data value increase moves the wiper up the
resistor ladder until the last tap point is reached at 10,021 Ω
[R
WB
AB
– 1 LSB + R
= R
AB
/256 + R
D7
D6
D5
D4
D3
D2
D1
D0
DECODER
LATCH
RDAC
AND
W
SHDN
].
Figure 31. Equivalent RDAC Circuit
W
= 39 + 60) for Data 0x01. The third connection
R
R
R
R
AB
A
B
) of the VR has 256 contact points
SW
DIGITAL CIRCUITRY
OMITTED FOR CLARITY
SW
SW
SHDN
SW
SW
2–1
2–2
N
N
0
1
R R
W
AB
/2
N
Rev. C | Page 12 of 20
Figure 31 shows a simplified diagram of the equivalent RDAC
circuit where the last resistor string is not accessed; therefore,
there is 1 LSB less of the nominal resistance at full scale in
addition to the wiper resistance.
The general equation determining the digitally programmed
resistance between W and B is
where:
D is the decimal equivalent of the binary code between 0 and 255,
which is loaded in the 8-bit RDAC register.
R
R
the internal switch.
Again, if R
tied to W. Table 6 shows the R
set in the RDAC latch.
Table 6. R
D (DEC)
255
128
1
0
Note that in the zero-scale condition, a finite wiper resistance of
60 Ω is present. Care should be taken to limit the current flow
between W and B in this state to a maximum current of no more
than 20 mA. Otherwise, degradation or possible destruction of
the internal switch contact can occur.
Similar to the mechanical potentiometer, the resistance of the
RDAC between Wiper W and Terminal A also produces a
digitally controlled resistance, R
used, Terminal B can be opened or tied to the wiper terminal.
The minimum R
the data loaded in the latch decreases in value. The general
equation for this operation is
For R
to W. Table 7 shows the R
the RDAC latch.
Table 7. R
D (DEC)
255
128
1
0
AB
W
is the wiper resistance contributed by the on resistance of
is the nominal end-to-end resistance.
R
R
AB
WB
WA
= 10 kΩ, Terminal B can be either open circuit or tied
(D) =
(D) =
WB
WA
AB
R
10021
5060
99
60
WB
= 10 kΩ, Terminal A can be either open circuit or
(D) at Selected Codes for R
(D) at Selected Codes for R
256
256 D
(Ω)
D
WA
R
99
5060
10021
10060
256
WA
−
resistance is for Data 0xFF and increases as
× R
(Ω)
Output State
Full-scale (R
Midscale
1 LSB
Zero-scale (wiper contact resistance)
AB
× R
WA
+ R
AB
resistance based on the code set in
W
WB
+ R
WA
resistance based on the code
WB
W
. When these terminals are
Full-scale
Midscale
Output State
1 LSB
Zero-scale
– 1 LSB + R
AB
AB
= 10 kΩ
= 10 kΩ
W
)
(1)
(2)