MCP4561-104E/MS Microchip Technology, MCP4561-104E/MS Datasheet - Page 41

IC DGTL POT 100K 256TAPS 8-MSOP

MCP4561-104E/MS

Manufacturer Part Number
MCP4561-104E/MS
Description
IC DGTL POT 100K 256TAPS 8-MSOP
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP4561-104E/MS

Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Taps
257
Resistance (ohms)
100K
Number Of Circuits
1
Temperature Coefficient
150 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Resistance In Ohms
100K
Number Of Pots
Single
Taps Per Pot
256
Resistance
100 KOhms
Wiper Memory
Non Volatile
Digital Interface
Serial (2-Wire, I2C)
Operating Supply Voltage
2.5 V, 3.3 V, 5 V
Supply Current
2.5 uA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP4561-104E/MS
Manufacturer:
MICROCHIP
Quantity:
12 000
MCP454X/456X/464X/466X
4.2.2.2
Terminal Control (TCON) Register
This register contains 8 control bits. Four bits are for
Wiper 0, and four bits are for Wiper 1.
Register 4-2
describes each bit of the TCON register.
The state of each resistor network terminal connection
is individually controlled. That is, each terminal
connection (A, B and W) can be individually connected/
disconnected from the resistor network. This allows the
system to minimize the currents through the digital
potentiometer.
The value that is written to this register will appear on
the resistor network terminals when the serial
command has completed.
When the WL1 bit is enabled, writes to the TCON
register bits R1HW, R1A, R1W, and R1B are inhibited.
When the WL0 bit is enabled, writes to the TCON
register bits R0HW, R0A, R0W, and R0B are inhibited.
On a POR/BOR this register is loaded with 1FFh
(9-bits), for all terminals connected. The Host
Controller needs to detect the POR/BOR event and
then update the Volatile TCON register value.
Additionally, there is a bit which enables the operation
of General Call commands.
© 2008 Microchip Technology Inc.
DS22107A-page 41

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