DS1859E-050/T&R Maxim Integrated Products, DS1859E-050/T&R Datasheet - Page 11

IC RES TEMP 50/50K 3MON 16-TSSOP

DS1859E-050/T&R

Manufacturer Part Number
DS1859E-050/T&R
Description
IC RES TEMP 50/50K 3MON 16-TSSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS1859E-050/T&R

Taps
256
Resistance (ohms)
50K
Number Of Circuits
2
Temperature Coefficient
50 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.85 V ~ 5.5 V
Operating Temperature
-40°C ~ 95°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Resistance In Ohms
50K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS1859E-050/T&RDS1859E-050/T&R
Manufacturer:
TI
Quantity:
445
Table 4. ADEN Address Configuration
Figure 2. Memory Organization, ADEN = 0
Variable Resistors
The value of each variable resistor is determined by
a temperature-addressed look-up table, which can
assign a unique value (00h to FFh) to each resistor for
every 2°C increment over the -40°C to +102°C range
(see Table 3). See the Temperature Conversion section
for more information.
The variable resistors can also be used in manual
mode. If the TEN bit equals 0, the resistors are in manu-
al mode and the temperature indexing is disabled. The
user sets the resistors in manual mode by writing to
addresses 82h and 83h in Table 01 to control resistors
0 and 1, respectively.
(ADDRESS
ENABLE)
ADEN
Dual, Temperature-Controlled Resistors with
0
1
AUXILIARY DEVICE ENABLE
MAIN DEVICE ENABLE
NO. OF SEPARATE
1 (Main Device only)
ADDRESSES
DEVICE
2
DEC
127
128
143
199
95
96
0
EN
0
____________________________________________________________________
AUXILIARY
DEVICE
INFORMATION
MEMORY PARTITION WITH ADEN BIT = 0
ADDITIONAL
See Figure 2
See Figure 3
TABLE SELECT
Internally Calibrated Monitors
7Fh
60h
0
DEVICE
MAIN
DECODER
5Fh
7Fh
EN
EN
Main and auxiliary memories can be accessed by two
separate device addresses. The Main Device address
is A2h (or value in Table 01 byte 8Ch, when ADFIX = 1)
and the Auxiliary Device address is A0h. A user option
is provided to respond to one or two device addresses.
This feature can be used to save component count in
SFF applications (Main Device address can be used)
or other applications where both GBIC (Auxiliary
Device address can be used) and monitoring functions
are implemented and two device addresses are need-
ed. The memory blocks are enabled with the corre-
sponding device address. Memory space from 80h and
Table 5. ADEN and ADFIX Bits
80h
TABLE CONTROL
ADEN
MON LOOK-UP
0
0
1
1
SEL
EN
TABLE 01
8Fh
ADFIX
80h
F0h
0
1
0
1
R0 LOOK-UP
RESERVED
TABLE
SEL
EN
TABLE 02
C7h
FFh
AUXILIARY
ADDRESS
A0h
A0h
80h
F0h
N/A
N/A
R1 LOOK-UP
Memory Description
RESERVED
TABLE
SEL
EN
TABLE 03
C7h
FFh
MAIN ADDRESS
(Table 01, 8Ch)
(Table 01, 8Ch)
EEPROM
EEPROM
A2h
A2h
11

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