MCP4725A0T-E/CH Microchip Technology, MCP4725A0T-E/CH Datasheet

IC DAC 12BIT W/I2C SOT23A-6

MCP4725A0T-E/CH

Manufacturer Part Number
MCP4725A0T-E/CH
Description
IC DAC 12BIT W/I2C SOT23A-6
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP4725A0T-E/CH

Number Of Converters
1
Package / Case
SOT-23-6
Settling Time
6µs
Number Of Bits
12
Data Interface
I²C, Serial
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Resolution
12 bit
Interface Type
Serial (2-Wire, I2C)
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP4725DM-PTPLS - BOARD DAUGHTER PICTAIL MCP4725
Power Dissipation (max)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MCP4725A0T-E/CHTR
MCP4725AOT-E/CHTR
MCP4725AOT-E/CHTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP4725A0T-E/CH
Manufacturer:
Microchip Technology
Quantity:
41 378
Part Number:
MCP4725A0T-E/CH
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
MCP4725A0T-E/CH
0
Features
• 12-Bit Resolution
• On-Board Non-Volatile Memory (EEPROM)
• ±0.2 LSB DNL (typical)
• External A0 Address Pin
• Normal or Power-Down Mode
• Fast Settling Time of 6 µs (typical)
• External Voltage Reference (V
• Rail-to-Rail Output
• Low Power Consumption
• Single-Supply Operation: 2.7V to 5.5V
• I
• Small 6-lead SOT-23 Package
• Extended Temperature Range: -40°C to +125°C
Applications
• Set Point or Offset Trimming
• Sensor Calibration
• Closed-Loop Servo Control
• Low Power Portable Instrumentation
• PC Peripherals
• Data Acquisition Systems
Block Diagram
© 2007 Microchip Technology Inc.
12-Bit Digital-to-Analog Converter with EEPROM Memory
V
V
- Eight Available Addresses
- Standard (100 kbps), Fast (400 kbps), and
DD
SS
2
C
High-Speed (3.4 Mbps) Modes
TM
Interface:
Power-on
EEPROM
Charge
Reset
Pump
A0
String DAC
Resistive
V
Amp
I
2
Op
OUT
C Interface Logic
SCL
DAC Register
DD
Register
)
Input
SDA
in SOT-23-6
DESCRIPTION
The MCP4725 is a low-power, high accuracy, single
channel, 12-bit buffered voltage output Digital-to-Ana-
log Convertor (DAC) with non-volatile memory
(EEPROM). Its on-board precision output amplifier
allows it to achieve rail-to-rail analog output swing.
The DAC input and configuration data can be
programmed to the non-volatile memory (EEPROM) by
the user using I
memory feature enables the DAC device to hold the
DAC input code during power-off time, and the DAC
output is available immediately after power-up. This
feature is very useful when the DAC device is used as
a supporting device for other devices in the network.
The device includes a Power-On-Reset (POR) circuit to
ensure reliable power-up and an on-board charge
pump for the EEPROM programming voltage. The
DAC reference is driven from V
power-down mode, the output amplifier can be config-
ured to present a low, medium, or high resistance out-
put load.
The MCP4725 has an external A0 address pin. This A0
pin can be tied to V
board.
The MCP4725 has a two-wire I
interface for standard (100 kHz), fast (400 kHz), or high
speed (3.4 MHz) mode.
The MCP4725 is an ideal DAC device where design
simplicity and small footprint is desired, and for applica-
tions requiring the DAC device settings to be saved
during power-off time.
The device is available in a small 6-pin SOT-23
package.
Package Type
SOT-23-6
V
V
V
OUT
SS
DD
MCP4725
2
C interface command. The non-volatile
1
2
3
DD
or V
SS
of the user’s application
2
C™ compatible serial
6
5
4
DS22039C-page 1
DD
A0
SCL
SDA
directly. In

Related parts for MCP4725A0T-E/CH

MCP4725A0T-E/CH Summary of contents

Page 1

... Resistive String DAC Op Amp OUT © 2007 Microchip Technology Inc. MCP4725 in SOT-23-6 DESCRIPTION The MCP4725 is a low-power, high accuracy, single channel, 12-bit buffered voltage output Digital-to-Ana- log Convertor (DAC) with non-volatile memory (EEPROM). Its on-board precision output amplifier allows it to achieve rail-to-rail analog output swing. ...

Page 2

... Digital input grounded, out- put unloaded, code = 000h V = 5.5V DD Code Range = 000h to FFFh Note 1 Note 1 Code = 000h -45°C to +25°C +25°C to +85°C Code FFFh, not including offset error ∞ 400 pF kΩ, Note 5V Grounded DD OUT Note 3 © 2007 Microchip Technology Inc. ...

Page 3

... This parameter is ensure by design and not 100% tested. 3: Within 1/2 LSB of the final value when code changes from 1/4 to 3/4 (400h to C00h) of full-scale. 4: Logic state of external address pin (A0 pin). © 2007 Microchip Technology Inc. = -40°C to +125°C. Typical values are at +25°C. A Min Typ ...

Page 4

... Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 6L-SOT-23 DS22039C-page 4 = +2.7V to +5.5V Sym Min Typ Max Units T -40 — +125 ° -40 — +125 ° -65 — +150 °C A θ — 190 — °C GND. SS Conditions © 2007 Microchip Technology Inc. ...

Page 5

... Code FIGURE 2-2: DNL vs. Code and Temperature (TA = -40°C to +125°C). 0.3 0.2 0.1 0.0 -0.1 0 1024 2048 3072 Code FIGURE 2-3: DNL vs. Code (V © 2007 Microchip Technology Inc. = +5.0V 0V kΩ 0.4 0.3 0.2 0.1 0.0 -0.1 0 3072 4096 = 5.5V). ...

Page 6

... FIGURE 2-10: Temperature (Code = 4000d). 450 400 350 300 250 200 150 100 50 0 -40 -25 -10 5 FIGURE 2-11 100 110 125 Temperature (°C) Output Error vs 2. 110 125 Temperature(°C) I vs. Temperature. DD © 2007 Microchip Technology Inc. ...

Page 7

... Current (µA) FIGURE 2-12: I Histogram . Current (µA) FIGURE 2-13: I Histogram. DD 2.50 2.00 5.5V 1.50 2.7V 1.00 0.50 0.00 -40 -25 - 110 125 Temperature (°C) FIGURE 2-14: Offset Error vs. Temperature and © 2007 Microchip Technology Inc. = +5.0V 0V kΩ FIGURE 2-15 2. Code = 000h 0 0 ...

Page 8

... Half-Scale Code Change: 7FFh to 000h V OUT FIGURE 2-22: Code Change: 800h to 7FFh V OUT FIGURE 2-23 100 pF OUT (2V/Div) CLK Time (2µs/Div) Half-Scale Settling Time. V OUT (2V/Div) CLK Time (2µs/Div) Half-Scale Settling Time. V OUT (20 mV/Div) Time (1µs/Div) Code Change Glitch. © 2007 Microchip Technology Inc. ...

Page 9

... Note: Unless otherwise indicated +25° CLK Time (2µs/Div) FIGURE 2-24: Exiting Power Down Mode. © 2007 Microchip Technology Inc. = +5.0V 0V kΩ OUT (2V/Div) MCP4725 , C = 100 pF DS22039C-page 9 ...

Page 10

... I “Device Addressing” for more details of the address bits. pin to a ground can be actively interface. The line to the SCL Serial Interface Com Serial Interface (logic ‘0’), or V (logic Master Output. See Section 7.2 © 2007 Microchip Technology Inc. ...

Page 11

... EQUATION 4- – V OUT Ideal INL = -------------------------------------- - LSB Where Code*LSB Ideal V = The output voltage measured at OUT the given input code © 2007 Microchip Technology Inc Analog 4 Output INL = 0.5 LSB 3 (LSB 000 Zero Scale – the DD is the ideal FIGURE 4-1: 4.4 ...

Page 12

... V – V OUT Ideal FSE = -------------------------------------- - LSB - REF OFFSET The reference voltage the MCP4725 REF DD Full-Scale Error Gain Error Actual Transfer Function after Offset Error Removed Ideal Transfer Function DAC Input Code Gain Error and Full-Scale o C. © 2007 Microchip Technology Inc. ...

Page 13

... It is specified in nV-Sec. and is measured with a full scale change on the digital input pins (Example: 000... 000 to 111... 111, or 111... 111 to 000... 000). The digital feedthrough is measured when the DAC is not being written to the register. © 2007 Microchip Technology Inc. MCP4725 DS22039C-page 13 ...

Page 14

... EEPROM before it was powered off. vs. Resistive Load. V OUT OUT Equation 4-1 LSB SIZES FOR MCP4725 (EXAMPLE) LSB Condition Size 0. 4096 1. 4096 as its voltage DD line can DD needs Table 4-3 (set for a middle scale increases DD © 2007 Microchip Technology Inc. ...

Page 15

... Note 1: In the power-down mode: V most of internal circuits are disabled. © 2007 Microchip Technology Inc. Resistive String DAC OP Amp Power-Down Control Circuit is OUT FIGURE 5-1: Power-Down Mode. (1) (1) ...

Page 16

... EEPROM writing), any new write command is ignored (for EEPROM or DAC register). EEPROM bits and factory default settings. shows the DAC input register bits of the MCP4725 DAC Input Data (12 bits Power- Data (12 bits) Down Select Table 5-3 shows the Table 5 middle scale output). DD © 2007 Microchip Technology Inc. ...

Page 17

... LSB DD 000000000010 (002h) 2 LSB 000000000001 (001h) 1 LSB 000000000000 (000h) 0 © 2007 Microchip Technology Inc. 6.1.1 WRITE COMMAND FOR FAST MODE ( bus line, the X = DON’T CARE) The fast write command is used to update the DAC register. The data in the EEPROM of the device is not affected by this command ...

Page 18

... PD1 PD0 D11 D10 ACK (MCP4725) at the falling edge of the ACK pulse of the 3rd byte. Function “ and see Note 2 ACK (MCP4725) 3rd byte Stop Bit Stop Bit 3rd byte ACK (MCP4725) see Note 2 © 2007 Microchip Technology Inc. ...

Page 19

... Note 1: RDY/BSY bit stays “low” during the EEPROM write. Any new write command including repeat bytes during the EEPROM write mode is ignored. The RDY/BSY bit sets to “high” after the EEPROM write is completed. FIGURE 6-2: Write Commands for DAC Input Register and EEPROM. © 2007 Microchip Technology Inc. ACK (MCP4725) 2nd byte 3rd byte X ...

Page 20

... POR PD1 PD0 X D11 D10 Current Settings DAC register Data (12 bits) in DAC Register See Note 2 5th byte X PD1 PD0 X D11 D10 D9 D8 EEPROM Data ACK (Master) 4th byte Stop ACK (Master) Bit 6th byte © 2007 Microchip Technology Inc. ...

Page 21

... The logic state of the A0 pin needs to be set prior to the interface communication. Figure 6-3 for Start bit Figure 6-2 for Device Code 1 Note: A2 and A1: Programmed (hard-wired) at the factory. Please Contact Microchip Technology Inc. for A2 and A1 programming options. A0: Use the logic level state of A0 pin. FIGURE 7-1: MCP4725 can Acknowledge bit ...

Page 22

... HIGH period of the clock signal. The data on the line must be changed during the LOW period of the clock signal. There is one clock pulse per bit of data. Each data transfer is initiated with a START condition and terminated with a STOP condition 7-3. © 2007 Microchip Technology Inc. ...

Page 23

... START CONDITION FIGURE 7-3: Data Transfer Sequence On The Serial Bus. © 2007 Microchip Technology Inc. course, setup and hold times must be taken into account. During reads, a master must send an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. ...

Page 24

... Only relevant for repeated Start condition Time between START and STOP conditions. kHz From From After this period, the first clock pulse is generated ns Only relevant for repeated Start condition Time between START and STOP conditions HD:DAT ) or SU:DAT parameter. AA © 2007 Microchip Technology Inc. ...

Page 25

... For Data Input: This parameter must be longer than t Clock Low time (T ) can be affected. LOW For Data Output: This parameter is characterized, and tested indirectly by testing T 5: All timing parameters in high-speed modes are tested at V © 2007 Microchip Technology Inc. = -40 to +85° Min Typ Max 0 — ...

Page 26

... MCP4725 SU:STA SCL T LOW T SDA HD:STA FIGURE 7- Bus Timing Data. DS22039C-page 26 T HIGH T SU:DAT T HD:DAT SU:STO T BUF 0.7V DD 0.3V DD © 2007 Microchip Technology Inc. ...

Page 27

... FIGURE 8- Bus Interface Connection with A0 pin tied © 2007 Microchip Technology Inc. Two devices with the same A2 and A1 address bits can be connected to the same I address pin (Example: A0 pin of device A is tied to V and the other device’s pin is tied to V 8.1.1 ...

Page 28

... Since the MCP4725 is a 12-bit DAC and uses the V supply as a reference source, it provides a V resolution per step. pin and SS capacitors of the MCP4725 DD range of 2.7V to 5.5V. Its output DD DD /4096 of DD © 2007 Microchip Technology Inc. ...

Page 29

... EXAMPLE 8-1: Set Point Or Threshold Calibration. © 2007 Microchip Technology Inc. put is scaled down by the factor of the ratio of the volt- age divider. Note that the bypass capacitor on the output of the voltage divider plays a critical function in attenuating the output noise of the DAC and the induced noise from the environment ...

Page 30

... OUT SCL SDA 4 DD 0.1 µF 10 µF V OUT D ------- OUT Thevenin Equivalent trip EXAMPLE 8-2: Single-Supply “Window” DAC. DS22039C-page MCU (MASTER CC+ sense CC- where D = DAC Input Code (0 – 4095 ------------------ OUT ( ) ( ) CC ---------------------------------------------------- - OUT ------------------------------------------- - CC+ Comparator V TRIP V CC- 0.1 µ © 2007 Microchip Technology Inc. ...

Page 31

... OUT OUT V = ------------------- - IN ⎛ ⎝ O IN+ EXAMPLE 8-3: Digitally-Controlled Bipolar Voltage Source. © 2007 Microchip Technology Inc. Example 8-3 configuration. R while R and R 3 offset. Note that R4 can be tied higher offset is desired. Note that a pull- could be used, instead desired MCU (MASTER OUT R 4 where D = DAC Input Code (0 – ...

Page 32

... kΩ and kΩ, the gain will be 0. Next, solve for R and R by setting the DAC 4096, knowing that the output needs to be +2.05V. ( ⋅ R 2.05V + 0 ---------------------- - = ----------------------------------------------- - ( ) ⋅ 1 kΩ, then kΩ DS22039C-page © 2007 Microchip Technology Inc. ...

Page 33

... DAC voltage output to a digitally selectable current source by adding a voltage follower and a sensor register. MCP4725 OUT V SCL SDA 0.1 µF 10 µF V OUT R SENSE FIGURE 8-3: Digitally Controllable Current Source. © 2007 Microchip Technology Inc MCU (MASTER OUT LOAD MCP4725 D × ----------- - V DD ...

Page 34

... Evaluation & Demonstration Boards The MCP4725 SOT-23-6 Evaluation Board is available from Microchip Technology Inc. This board works with Microchip’s PICkit™ Serial Analyzer. The user can program the DAC input codes and EEPROM data, or read the programmed data using the easy to use PICkit Serial Analyzer with the Graphic User Interface soft- ware ...

Page 35

... PACKAGING INFORMATION 10.1 Package Marking Information 6-Lead SOT-23 Part Number MCP4725A0T-E/CH XXNN MCP4725A1T-E/CH MCP4725A2T-E/CH 1 MCP4725A3T-E/CH Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN ...

Page 36

... L L1 NOM MAX 6 0.95 BSC 1.90 BSC – 1.45 – 1.30 – 0.15 – 3.20 – 1.80 – 3.10 – 0.60 – 0.80 – 30° – 0.26 – 0.51 Microchip Technology Drawing C04-028B © 2007 Microchip Technology Inc. ...

Page 37

... Added characterization graphs to document. 2. Numerous edits throughout. 3. Add new package marking address options. Updated package marking information and package outline drawings. 4. Added adress options to Product Identification System page. Revision A (April 2007) • Original Release of this Document. © 2007 Microchip Technology Inc. MCP4725 DS22039C-page 37 ...

Page 38

... MCP4725 NOTES: DS22039C-page 38 © 2007 Microchip Technology Inc. ...

Page 39

... External 1 External 0 External d) 1 External MCP4725 . MCP4725A0T-E/CH: Tape and Reel, Extended Temp., 6LD SOT-23 pkg. Address Option = A0 MCP4725A1T-E/CH: Tape and Reel, Extended Temp., 6LD SOT-23 pkg. Address Option = A1 MCP4725A2T-E/CH: Tape and Reel, Extended Temp., 6LD SOT-23 pkg. Address Option = A2 MCP4725A3T-E/CH: Tape and Reel, Extended Temp ...

Page 40

... MCP4725 NOTES: DS22039C-page 40 © 2007 Microchip Technology Inc. ...

Page 41

... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 42

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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