AD5424YRUZ Analog Devices Inc, AD5424YRUZ Datasheet - Page 5

• Manufacturer Part Number: AD5424YRUZ
• Description: IC DAC 8BIT MULTIPLYING 16-TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD5424YRUZ

• Data Interface: Parallel
• Settling Time: 30ns
• Number Of Bits: 8
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 25µW
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Resolution (bits): 8bit
• Sampling Rate: 20.4MSPS
• Input Channel Type: Parallel
• Supply Voltage Range - Analog: 2.5V To 5.5V
• Supply Current: 400nA
• Digital Ic Case Style: TSSOP
• Number Of Channels: 1
• Resolution: 8b
• Interface Type: Parallel
• Single Supply Voltage (typ): 3.3/5V
• Dual Supply Voltage (typ): Not RequiredV
• Architecture: R-2R
• Power Supply Requirement: Single
• Output Type: Current
• Integral Nonlinearity Error: ±0.25LSB
• Single Supply Voltage (min): 2.5V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD5424EBZ - BOARD EVALUATION FOR AD5424
• Lead Free Status / Rohs Status: Compliant

TIMING CHARACTERISTICS
All input signals are specified with tr = tf = 1 ns (10% to 90% of V
V
Table 2.
Parameter
t
t
t
t
t
t
t
t
t
1
1
2
3
4
5
6
7
8
9
Guaranteed by design, not subject to production test.
REF
= 10 V, I
1
OUT
2 = 0 V; temperature range for Y version: −40°C to +125°C ; all specifications T
V
0
0
10
6
0
5
9
20
40
5
10
DD
DATA
R/W
= 2.5 V to 5.5 V
CS
t
1
DATA VALID
t
3
t
4
V
0
0
10
6
0
5
7
10
20
5
10
DD
= 4.5 V to 5.5 V
Figure 2. Timing Diagram
t
5
Rev. B | Page 5 of 32
t
2
DD
) and timed from a voltage level of (V
t
7
t
6
t
8
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns typ
ns max
ns typ
ns max
DATA VALID
MIN
AD5424/AD5433/AD5445
to T
Conditions/Comments
R/W to CS setup time
R/W to CS hold time
CS low time (write cycle)
Data setup time
Data hold time
R/W high to CS low
CS min high time
Data access time
Bus relinquish time
MAX
t
9
t
2
IL
, unless otherwise noted.
+ V
IH
)/2. V
DD
= 2.5 V to 5.5 V,