AD9116BCPZ Analog Devices Inc, AD9116BCPZ Datasheet
AD9116BCPZ
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AD9116BCPZ Summary of contents
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FEATURES Power dissipation @ 3 output 191 MSPS 232 mW @ 125 MSPS Sleep mode: < 3.3 V Supply voltage: 1 3.3 V SFDR to Nyquist 86 dBc @ 1 ...
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AD9114/AD9115/AD9116/AD9117 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 3 Functional Block Diagram .............................................................. 4 Specifications ..................................................................................... 5 DC Specifications ......................................................................... 5 Digital Specifications ................................................................... 7 AC Specifications ...
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REVISION HISTORY 3/09—Rev Rev. A Changes to Product Title and General Description Section ....... 1 Changes to Figure 1 ........................................................................... 4 Changed mA..................................... 5 OUTFS xOUTFS Changes to Table 1 ...
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AD9114/AD9115/AD9116/AD9117 FUNCTIONAL BLOCK DIAGRAM DB11 DB10 DB9 DB8 DVDDIO DVSS DVDD 1.8V LDO DB7 DB6 DB5 1V SPI QR INTERFACE SET 2kΩ 10kΩ I REF 100µA BAND AUX1DAC GAP 1 INTO 2 INTERLEAVED AUX2DAC I DATA DATA INTERFACE Q DATA ...
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SPECIFICATIONS DC SPECIFICATIONS AVDD = 3.3 V, DVDD = 1.8 V, DVDDIO = 3.3 V, CVDD = 3 MIN MAX Table 1. Parameter Min RESOLUTION ACCURACY, AVDD = DVDDIO = CVDD = 3.3 V ...
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AD9114/AD9115/AD9116/AD9117 Parameter Min REFERENCE OUTPUT Internal Reference Voltage 0.98 Output Resistance REFERENCE INPUT Voltage Compliance AVDD = 3.3 V 0.1 AVDD = 1.8 V 0.1 Input Resistance External Reference Mode DAC MATCHING Gain Matching −1 ANALOG SUPPLY VOLTAGES AVDD 1.7 ...
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DIGITAL SPECIFICATIONS AVDD = 3.3 V, DVDD = 1.8 V, DVDDIO = 3.3 V, CVDD = 3 MIN MAX Table 2. Parameter DAC CLOCK INPUT (CLKIN Maximum Clock Rate SERIAL ...
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AD9114/AD9115/AD9116/AD9117 AC SPECIFICATIONS AVDD = 3.3 V, DVDD = 1.8 V, DVDDIO = 3.3 V, CVDD = 3 MIN MAX Table 3. Parameter SPURIOUS FREE DYNAMIC RANGE (SFDR 125 MSPS ...
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ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Rating AVDD, DVDDIO, CVDD to AVSS, −0 +3.9 V DVSS, CVSS DVDD to DVSS −0 +2.1 V AVSS to DVSS, CVSS −0 +0.3 V DVSS to AVSS, CVSS ...
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AD9114/AD9115/AD9116/AD9117 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Table 7. AD9114 Pin Function Descriptions Pin No. Mnemonic Description DB[5:2] Digital Inputs. 5 DVDDIO Digital I/O Supply Voltage Input (1 3.3 V Nominal). 6 DVSS Digital Common. 7 ...
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Pin No. Mnemonic Description 29 IOUTN Complementary I DAC Current Output. Full-scale current is sourced when all data bits are 0s. 30 RLIN Load Resistor (62.5 Ω) to the CMLI Pin. For the internal load resistor to be used, this ...
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AD9114/AD9115/AD9116/AD9117 Table 8. AD9115 Pin Function Description Pin No. Mnemonic Description DB[7:4] Digital Inputs. 5 DVDDIO Digital I/O Supply Voltage Input (1 3.3 V Nominal). 6 DVSS Digital Common. 7 DVDD Digital Core Supply Voltage ...
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Pin No. Mnemonic Description 31 CMLI I DAC Output Common-Mode Level. When the internal on-chip (IR on-chip IR CML disabled, this pin is the common-mode load for I DAC and must be connected to AVSS through a resistor, see the ...
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AD9114/AD9115/AD9116/AD9117 Table 9. AD9116 Pin Function Descriptions Pin No. Mnemonic Description DB[9:6] Digital Inputs. 5 DVDDIO Digital I/O Supply Voltage Input (1 3.3 V Nominal). 6 DVSS Digital Common. 7 DVDD Digital Core Supply Voltage ...
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Pin No. Mnemonic Description 31 CMLI I DAC Output Common-Mode Level. When the internal on-chip (IR on-chip IR disabled, this pin is the common mode load for I DAC and must be connected to AVSS through a resistor, see the ...
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AD9114/AD9115/AD9116/AD9117 Table 10. AD9117 Pin Function Descriptions Pin No. Mnemonic Description DB[11:8] Digital Inputs. 5 DVDDIO Digital I/O Supply Voltage Input (1 3.3 V Nominal). 6 DVSS Digital Common. 7 DVDD Digital Core Supply Voltage ...
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Pin No. Mnemonic Description 31 CMLI I DAC Output Common-Mode Level. When the internal on-chip (IR the on-chip IR is disabled, this pin is the common-mode load for I DAC and must be connected to AVSS through a resistor, see ...
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AD9114/AD9115/AD9116/AD9117 TYPICAL PERFORMANCE CHARACTERISTICS AVDD, DVDD, DVDDIO, CVDD = 1 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0 2048 4096 6144 8192 10,240 12,288 14,336 16,384 CODE Figure 6. AD9117 Precalibration INL at 1 ...
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CODE Figure 12. AD9117 Precalibration DNL at 3 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 0 512 1024 1536 ...
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AD9114/AD9115/AD9116/AD9117 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 0 512 1024 1536 2048 2560 CODE Figure 18. AD9116 Precalibration INL at 3 0.5 0.4 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 0 512 ...
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CODE Figure 24. AD9115 Precalibration DNL at 1 0.25 0.20 0.15 0.10 0.05 0 –0.05 –0.10 –0.15 –0.20 –0.25 0 128 ...
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AD9114/AD9115/AD9116/AD9117 0.035 0.025 0.015 0.005 0 –0.005 –0.015 –0.025 –0.035 128 160 CODE Figure 30. AD9114 Precalibration INL at 1 0.025 0.020 0.015 0.010 0.005 0 –0.005 –0.010 –0.015 –0.020 –0.025 0 32 ...
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CODE Figure 36. AD9114 Precalibration DNL at 3 –124 –130 AD9114 –136 –142 AD9115 –148 AD9116 –154 AD9117 –160 0 ...
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AD9114/AD9115/AD9116/AD9117 –130 –136 –142 –148 –154 –160 –166 (MHz) OUT Figure 42. AD9117 NSD at Two Output Currents vs –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 START ...
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OUT Figure 48. AD9117 IMD at Three Temperatures –6dB 65 –3dB 60 ...
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AD9114/AD9115/AD9116/AD9117 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 START 1MHz 1.5MHz/DIV Figure 54. AD9117 Singe Tone Spectrum, 1 AD9117 70 AD9116 AD9115 AD9114 (MHz) OUT ...
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OUT Figure 60. AD9117 SFDR at Three Digital Signal Levels vs 4mA 72 66 8mA 60 ...
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AD9114/AD9115/AD9116/AD9117 –60 4mA PRECAL 4mA POSTCAL 8mA PRECAL 8mA POSTCAL –66 –72 – (MHz) OUT Figure 66. AD9117 One-Carrier W-CDMA First ACLR vs. f –62 4mA PRECAL 4mA POSTCAL 8mA PRECAL 8mA POSTCAL –68 –74 ...
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AC COUPLED: UNSPECIFIED BELOW 20MHz INPUT ATT 8.00dB STEP 2dB CENTER 22.90MHz VBW 300kHz RES BW 30kHz SWEEP 126ms (601pts) TOTAL CARRIER POWER –15.23dBm/7.87420MHz REF CARRIER POWER –18.09dBm/4.03420MHz RCC FILTER: OFF FILTER ALPHA 0.22 OFFSET INTEG LOWER FREQ BW dBc ...
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AD9114/AD9115/AD9116/AD9117 –50 4mA PRECAL 4mA POSTCAL 8mA PRECAL –56 8mA POSTCAL –62 –68 – (MHz) OUT Figure 78. AD9117 Two-Carrier W-CDMA Third ACLR vs. f 0.4 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 0 ...
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TERMINOLOGY Linearity Error or Integral Nonlinearity (INL) Linearity error is defined as the maximum deviation of the actual analog output from the ideal output, determined by a straight line drawn from zero scale to full scale. Differential Nonlinearity (DNL) DNL ...
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AD9114/AD9115/AD9116/AD9117 THEORY OF OPERATION DB11 DB10 DB9 DB8 DVDDIO DVSS DVDD 1.8V LDO DB7 DB6 DB5 Figure 84 shows a simplified block diagram of the AD9114/ AD9115/AD9116/AD9117 that consists of two DACs, digital control logic, and a full-scale output current ...
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SERIAL PERIPHERAL INTERFACE (SPI) The serial port of the AD9114/AD9115/AD9116/AD9117 is a flexible, synchronous serial communications port that allows easy interfacing to many industry-standard microcontrollers and micro- processors. The serial I/O is compatible with most synchronous transfer formats, including both ...
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AD9114/AD9115/AD9116/AD9117 MSB/LSB TRANSFERS The serial port of the AD9114/AD9115/AD9116/AD9117 can support both most significant bit (MSB) first or least significant bit (LSB) first data formats. This functionality is controlled by the LSBFIRST bit (Register 0x00, Bit 6). The default is ...
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SPI REGISTER MAP Table 13. Name Addr Default SPI Control 0x00 0x00 Power-Down 0x01 0x40 Data Control 0x02 0x34 I DAC Gain 0x03 0x00 IRSET 0x04 0x00 IRCML 0x05 0x00 Q DAC Gain 0x06 0x00 QRSET 0x07 0x00 QRCML 0x08 ...
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AD9114/AD9115/AD9116/AD9117 SPI REGISTER DESCRIPTIONS Reading these registers returns previously written values for all defined register bits, unless otherwise noted. Table 14. Register Address Bit Name SPI Control 0x00 6 LSBFIRST 5 Reset 4 LNGINS Power Down 0x01 7 LDOOFF 6 ...
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Register Address Bit Name IRSET 0x04 7 IRSETEN 5:0 IRSET[5:0] IRCML 0x05 7 IRCMLEN 5:0 IRCML[5:0] Q DAC Gain 0x06 5:0 Q DACGAIN[5:0] QRSET 0x07 7 QRSETEN 5:0 QRSET[5:0] QRCML 0x08 7 QRCMLEN 5:0 QRCML[5:0] AUXDAC Q 0x09 7:0 QAUXDAC[7:0] ...
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AD9114/AD9115/AD9116/AD9117 Register Address Bit Name AUXDAC I 0x0B 7:0 IAUXDAC[7:0] AUX CTLI 0x0C 7 IAUXEN 6:5 IAUXRNG[1:0] 4:2 IAUXOFS[2:0] 1:0 IAUXDAC[9:8] Reference 0x0D 5:0 RREF[5:0] Resistor Cal Control 0x0E 7 PRELDQ 6 PRELDI 5 CALSELQ 4 CALSELI 3 CALCLK 2:0 ...
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Register Address Bit Name Memory R/W 0x12 7 CALRSTQ 6 CALRSTI 4 CALEN 3 SMEMWR 2 SMEMRD 1 UNCALQ 0 UNCALI CLKMODE 0x14 7:6 CLKMODEQ[1:0] 4 Searching 3 Reacquire 2 CLKMODEN 1:0 CLKMODEI[1:0] Version 0x1F 7:0 Version[7:0] AD9114/AD9115/AD9116/AD9117 Description 0 ...
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AD9114/AD9115/AD9116/AD9117 DIGITAL INTERFACE OPERATION Digital data for the I and Q DACs is supplied over a single parallel bus (DB[n:0], where for the AD9114 for the AD9115 for the AD9116, and 13 for ...
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OR D-FF 0 DB[n:0] (INPUT) DCLKIO-INT NOTES: 1. DB[n:0], WHERE FOR THE AD9114, 9 FOR THE AD9115, 11 FOR THE AD9116, AND 13 FOR THE AD9117. Figure 94. Simplified Diagram of AD9114/AD9115/AD9116/AD9117 Timing DIGITAL DATA LATCHING AND ...
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AD9114/AD9115/AD9116/AD9117 Table 15. Timer Register List Bit Name Description CLKMODEQ[1:0] Q datapath retimer clock selected output. Valid after the searching bit goes low. Searching High indicates that the internal datapath retimer is searching for the clock relationship (DAC is not ...
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REFERENCE OPERATION The AD9114/AD9115/AD9116/AD9117 contains an internal 1.0 V band gap reference. The internal reference can be disabled by setting Bit 0 (EXTREF) of the power-down register (Address 0x01) through the SPI interface. To use the internal reference, decouple the ...
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AD9114/AD9115/AD9116/AD9117 × V /IR IOUTFS REFIO SET × V /QR QOUTFS REFIO SET A differential pair (IOUTP/IOUTN or QOUTP/QOUTN) typically drives a resistive load directly or via a transformer coupling is ...
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The AD9114/AD9115/AD9116/AD9117 allow reading and writing of the calibration coefficients. There are 32 coefficients in total. The read/write feature of the coefficients can be useful for improving the results of the self-calibration routine by averaging the results of several self-calibration ...
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AD9114/AD9115/AD9116/AD9117 Fine Gain Each main DAC has independent fine gain control using the lower six bits in Register 0x03 (I DACGAIN[5:0]) and Register 0x06 (Q DACGAIN[5:0]). Unlike Coarse Gain Option 1, this impacts only the main DAC full-scale output current. ...
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APPLICATIONS INFORMATION OUTPUT CONFIGURATIONS The following sections illustrate some typical output configu- rations for the AD9114/AD9115/AD9116/AD9117. Unless otherwise noted assumed that I xOUTFS 20 mA. For applications requiring the optimum dynamic performance, a differential output configuration is suggested. ...
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AD9114/AD9115/AD9116/AD9117 DIFFERENTIAL BUFFERED OUTPUT USING AN OP AMP A dual op amp (see the circuit shown in Figure 104) can be used in a differential version of the single-ended buffer shown in Figure 103. The same RC network is used ...
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Two registers are assigned to each DAC with 10 bits for the actual DAC current to be generated, a 3-bit offset (and gain) adjustment, a 2-bit current range adjustment, and an enable/ disable bit. Setting the QAUXOFS (Register 0x0A) and ...
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AD9114/AD9115/AD9116/AD9117 Note that LO feedthrough compensation is independent of phase compensation. However, gain compensation can affect the LO compensation because the gain compensation may change the common-mode level of the signal. The dc offset of some modulators is common-mode level ...
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MODIFYING THE EVALUATION BOARD TO USE THE ADL5370 ON-BOARD QUADRATURE MODULATOR The evaluation board contains an Analog Devices, Inc., ADL5370 quadrature modulator. The AD9114/AD9115/ AD9116/AD9117 and the ADL5370 provide an easy-to-interface DAC/modulator combination that can be easily characterized on the ...
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AD9114/AD9115/AD9116/AD9117 EVALUATION BOARD SCHEMATICS AND ARTWORK SCHEMATICS RC0603 CC0603 RC0603 RC0603 CC0603 CC0603 Figure 111. Power Supplies and Filters Rev Page 07466-184 RC0603 CC0603 RC0603 CC0603 ...
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RP1 DNP RNETCTS743-8 FEMALE ANGLE RIGHT Figure 112. Digital Inputs Rev Page AD9114/AD9115/AD9116/AD9117 07466-185 RNETCTS743 ...
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AD9114/AD9115/AD9116/AD9117 RC0402 RC0402 RC0402 RC0402 CC0402 CC0402 RC0402 RC0402 RC0402 Figure 113. Clock Input and DUT Rev Page 07466-186 RC0603 R7 ...
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RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 Figure 114. IOUT Network and FSADJ1 AD9114/AD9115/AD9116/AD9117 CC0603 CC0402 RC0603 JP12 JP9 RC0603 JP8 JP7 Rev Page 07466-187 CC0805 CC0603 RC0603 RC0603 RC0603 RC0805 ERA6Y ERA6YEB323V, RC0805 ERA6Y ...
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AD9114/AD9115/AD9116/AD9117 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 RC0603 Figure 115. QOUT Network and FSADJ2 Rev Page 07466-188 RC0603 JP77 RC0603 RC0603 RC0805 JP20 ERA6Y ERA6YEB323V, RC0805 JP16 ERA6Y ERA6YEB323V, RC0805 JP21 ERA6Y ...
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GRN S3 S1 MLX-0532610571 Figure 116. SPI Port Rev Page AD9114/AD9115/AD9116/AD9117 07466-189 ...
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AD9114/AD9115/AD9116/AD9117 1k RC0603 R24 C73 100PF C54 100PF ETC1-1-13 C53 100PF 1k RC0603 R61 Figure 117. Modulated Output Rev Page 07466-190 ...
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CC0402 CC0402 HSMS-281C RC0805 Figure 118. Clock Driver Chip Rev Page AD9114/AD9115/AD9116/AD9117 07466-191 ...
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AD9114/AD9115/AD9116/AD9117 SILKSCREENS Figure 119. Layer 2, Ground Plane Rev Page ...
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AD9114/AD9115/AD9116/AD9117 Figure 120. Layer 3, Power Plane Rev Page ...
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AD9114/AD9115/AD9116/AD9117 Figure 121. Assembly—Primary Side Rev Page ...
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AD9114/AD9115/AD9116/AD9117 Figure 122. Assembly—Secondary Side Rev Page ...
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AD9114/AD9115/AD9116/AD9117 Figure 123. Solder Mask—Primary Side with Socket Rev Page ...
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AD9114/AD9115/AD9116/AD9117 Figure 124. Solder Mask—Secondary Side Rev Page ...
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AD9114/AD9115/AD9116/AD9117 Figure 125. Hard Gold Plated with Bumps and Socket Rev Page ...
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AD9114/AD9115/AD9116/AD9117 Figure 126. Primary Side Paste Rev Page ...
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AD9114/AD9115/AD9116/AD9117 Figure 127. Secondary Side Paste Rev Page ...
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AD9114/AD9115/AD9116/AD9117 Figure 128. Silkscreen—Primary Side Rev Page ...
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AD9114/AD9115/AD9116/AD9117 Figure 129. Silkscreen—Secondary Side Rev Page ...
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AD9114/AD9115/AD9116/AD9117 Figure 130. Layer 1—Primary Side Rev Page ...
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AD9114/AD9115/AD9116/AD9117 Figure 131. Layer 4—Secondary Side Rev Page ...
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AD9114/AD9115/AD9116/AD9117 Figure 132. Immersion Gold, No Socket, No Bumps Rev Page ...
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AD9114/AD9115/AD9116/AD9117 Figure 133. Solder Mask—Primary Side, No Socket Rev Page ...
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BILL OF MATERIALS Table 18. Qty Reference Designator Device 6 C1, C2, C4, C5, C32, C57 CAPSMDA 17 C3, C6, C7, C8, C9, C10, C11, CC0603 C15, C16, C22, C24, C26, C27, C48, C60, C61, C107 11 C12, C14, C17, ...
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AD9114/AD9115/AD9116/AD9117 Qty Reference Designator Device 11 L1, L2, L3, L4, L5, L6, L7, L12, IND1812 L13, L16, L19 4 L8, L9, L10, L11 IND1008 4 L14, L17, L18, L20 IND1008 1 L15 IND1210 1 P1 USB-MINIB 1 P3 Molex 0532610571 ...
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Qty Reference Designator Device 2 RP3, RP4 RNETCTS743-8 2 SW1, SW2 KEYBDSWG 4 T1, T2, T3, T6 ADTL1- ETC1-1-13 2 T5, T8 ADT9- JTX-4-10T 16 LOOPMINI TP1, TP3, TP17, TP18, TP19, TP20, TP22, TP25, TP26, TP30, ...
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... AD9114BCPZRL7 −40°C to +85°C 1 AD9115BCPZ −40°C to +85°C 1 AD9115BCPZRL7 −40°C to +85°C 1 AD9116BCPZ −40°C to +85°C 1 AD9116BCPZRL7 −40°C to +85°C AD9117BCPZ 1 −40°C to +85°C 1 AD9117BCPZRL7 −40°C to +85°C AD9114-EBZ 1 1 AD9115-EBZ 1 AD9116-EBZ ...
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NOTES AD9114/AD9115/AD9116/AD9117 Rev Page ...
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AD9114/AD9115/AD9116/AD9117 NOTES ©2008–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07466-0-3/09(A) Rev Page ...