CY7C195-25DMB Cypress Semiconductor Corp, CY7C195-25DMB Datasheet - Page 5

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CY7C195-25DMB

Manufacturer Part Number
CY7C195-25DMB
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C195-25DMB

Lead Free Status / Rohs Status
Not Compliant
Switching Waveforms
Notes:
Document #: 38-05162 Rev. **
12. Device is continuously selected: CE
13. Address valid prior to or coincident with CE
14. Data I/O will be high impedance if OE = V
15. If any CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
11. WE is HIGH for read cycle.
Read Cycle No. 2
Write Cycle No. 1 (CE Controlled)
Read Cycle No. 1
(7C195 and
DATA OUT
CURRENT
CE
DATA OUT
ADDRESS
SUPPLY
7C196)
ADDRESS
1
DATA I/O
, CE
(7C196)
V
OE
CC
2
CE
CE
WE
1
2
[11, 13]
[11, 12]
PREVIOUS DATA VALID
HIGH IMPEDANCE
t
PU
1
t
= V
LZCE
IL
IH
, CE
[10, 14, 15]
1
(7C195 and 7C196).
t
t
ACE
and CE
LZOE
2
= V
50%
t
t
SA
t
IL
OHA
DOE
2
(7C196), and OE = V
transition LOW.
t
AA
t
AW
t
RC
IL
(7C195 and 7C196).
t
WC
t
RC
DATA VALID
t
SCE
t
DATA VALID
SD
t
HD
DATA VALID
t
HA
t
t
HZOE
HZCE
t
PD
50%
CY7C194
CY7C195
CY7C196
IMPEDANCE
Page 5 of 12
HIGH
C194-6
C194-7
C194-8
ICC
ISB
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