LTC4065EDC Linear Technology, LTC4065EDC Datasheet - Page 15

• Manufacturer Part Number: LTC4065EDC
• Manufacturer: Linear Technology

Specifications of LTC4065EDC

• Battery Type: Li-Ion
• Output Current: 500mA
• Output Voltage: 4.2V
• Operating Supply Voltage (min): 3.75V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 85C
• Mounting: Surface Mount
• Pin Count: 6
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

APPLICATIO S I FOR ATIO
PACKAGE DESCRIPTIO
Furthermore, the voltage at the PROG pin will change
proportionally with the charge current as discussed in the
Programming Charge Current section.
It is important to remember that LTC4065/LTC4065A
applications do not need to be designed for worst-case
thermal conditions since the IC will automatically reduce
power dissipation when the junction temperature reaches
approximately 115°C.
Board Layout Considerations
In order to deliver maximum charge current under all
conditions, it is critical that the exposed metal pad on the
backside of the LTC4065/LTC4065A package is soldered
to the PC board ground. Correctly soldered to a 2500mm
double-sided 1 oz. copper board the LTC4065/LTC4065A
has a thermal resistance of approximately 60°C/W. Failure
to make thermal contact between the Exposed Pad on the
2.50 ±0.05
1.15 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
TOP AND BOTTOM OF PACKAGE
0.61 ±0.05
(2 SIDES)
U
1.42 ±0.05
(2 SIDES)
U
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
0.50 BSC
0.25 ± 0.05
W
0.675 ±0.05
U
PACKAGE
OUTLINE
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703)
U
(SEE NOTE 6)
TOP MARK
PIN 1 BAR
0.200 REF
DC Package
2
backside of the package and the copper board will result
in thermal resistances far greater than 60°C/W. As an
example, a correctly soldered LTC4065/LTC4065A can
deliver over 750mA to a battery from a 5V supply at room
temperature. Without a backside thermal connection, this
number could drop to less than 500mA.
V
Many types of capacitors can be used for input bypassing;
however, caution must be exercised when using multi-
layer ceramic capacitors. Because of the self-resonant and
high Q characteristics of some types of ceramic capaci-
tors, high voltage transients can be generated under some
start-up conditions, such as connecting the charger input
to a live power source. For more information, refer to
Application Note 88.
CC
Bypass Capacitor
0.75 ±0.05
2.00 ±0.10
(4 SIDES)
0.00 – 0.05
LTC4065/LTC4065A
0.56 ± 0.05
(2 SIDES)
R = 0.115
BOTTOM VIEW—EXPOSED PAD
TYP
1.37 ±0.05
(2 SIDES)
3
4
6
1
0.50 BSC
0.38 ± 0.05
0.25 ± 0.05
PIN 1
CHAMFER OF
EXPOSED PAD
(DC6) DFN 1103
15
4065fb