DS4404N+T&R Maxim Integrated Products, DS4404N+T&R Datasheet - Page 3

• Manufacturer Part Number: DS4404N+T&R
• Description: IC DAC 4CH I2C ADJ 14-TDFN
• Manufacturer: Maxim Integrated Products

Specifications of DS4404N+T&R

• Number Of Bits: 5
• Data Interface: I²C
• Number Of Converters: 4
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-TDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -
• Settling Time: -

OUTPUT CURRENT CHARACTERISTICS (continued)
(V
I
(V
Note 1: All voltages with respect to ground. Currents entering the IC are specified positive, and currents exiting the IC are negative.
Note 2: Supply current specified with all outputs set to zero current setting with all inputs (except A1 and A0, which can be open) driven
Note 3: The output-voltage full-scale current ranges must be satisfied to ensure the device meets its accuracy and linearity specifications.
Note 4: Temperature drift excludes drift caused by external resistor.
Note 5: Differential linearity is defined as the difference between the expected incremental current increase with respect to position
Note 6: Integral linearity is defined as the difference between the expected value as a function of the setting and the actual value.
Note 7: Timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I
Note 8: C
Output-Current Power-Supply
Rejection Ratio
Output Leakage Current at Zero
Current Setting
Output-Current Differential
Linearity
Output-Current Integral Linearity
2
SCL Clock Frequency
Bus Free Time Between STOP
and START Conditions
Hold Time (Repeated) START
Condition
Low Period of SCL
High Period of SCL
Data Hold Time
Data Setup Time
START Setup Time
SDA and SCL Rise Time
SDA and SCL Fall Time
STOP Setup Time
SDA and SCL Capacitive Loading
CC
CC
C AC ELECTRICAL CHARACTERISTICS
Two/Four-Channel, I
= +2.7V to +5.5V, T A = -40°C to +85°C.)
= +2.7V to +5.5V, T
to well-defined logic levels. SDA and SCL are connected to V
including I
and the actual increase. The expected incremental increase is the full-scale range divided by 31.
The expected value is a straight line between the zero and the full-scale values proportional to the setting.
B
PARAMETER
PARAMETER
—total capacitance of one bus line in pF.
RFS
is I
A
CC
= -40°C to +85°C.)
+ (2 x I
RFS
SYMBOL
SYMBOL
).
t
t
t
t
t
DH:DAT
HD:STA
SU:DAT
SU:STO
I
SU:STA
t
t
ZERO
t
DNL
f
HIGH
LOW
INL
BUF
SCL
C
t
t
_____________________________________________________________________
R
F
B
(Note 7)
(Note 8)
(Note 8)
(Note 8)
DC
(Note 5)
(Note 6)
2
C Adjustable Current DAC
CONDITIONS
CONDITIONS
CC
. Excludes current through R
0.1C
0.1C
20 +
20 +
MIN
MIN
100
1.3
0.6
1.3
0.6
0.6
0.6
FS
-1
0
0
resistors (I
B
B
2
TYP
0.33
TYP
C standard-mode timing.
RFS
). Total current
MAX
MAX
400
300
300
400
0.5
0.9
+1
1
UNITS
UNITS
LSB
LSB
%/V
kHz
μA
pF
µs
µs
µs
µs
µs
ns
µs
ns
ns
µs
3