MAX515CSA+T Maxim Integrated Products, MAX515CSA+T Datasheet - Page 12

IC DAC 10BIT VOLT OUT 8-SOIC

MAX515CSA+T

Manufacturer Part Number
MAX515CSA+T
Description
IC DAC 10BIT VOLT OUT 8-SOIC
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX515CSA+T

Settling Time
25µs
Number Of Bits
10
Data Interface
Serial
Number Of Converters
1
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
As with any amplifier, the MAX504/MAX515’s output
buffer offset can be positive or negative. When the off-
set is positive, it is easily accounted for (Figure 10).
However, when the offset is negative, the buffer output
cannot follow linearly when there is no negative supply.
In that case, the amplifier output (VOUT) remains at
ground until the DAC voltage is sufficient to overcome
the offset and the output becomes positive.
Normally, linearity is measured after accounting for
zero error and gain error. Since, in single-supply opera-
tion, the actual value of a negative offset is unknown, it
cannot be accounted for during test. Additionally, the
output buffer amplifier exhibits a nonlinearity near-zero
output when operating with a single supply. To account
for this nonlinearity in the MAX504/MAX515, linearity
and gain error are measured from code 3 to code
1023. The output buffer’s offset and nonlinearity do not
affect monotonicity, and these DACs are guaranteed
monotonic starting with code zero. In dual-supply oper-
ation, linearity and gain error are measured from code
0 to 1023.
Best system performance is obtained with printed cir-
cuit boards that use separate analog and digital
ground planes. Wire-wrap boards are not recommend-
ed. The two ground planes should be connected
together at the low-impedance power-supply source.
5V, Low-Power, Voltage-Output,
Serial 10-Bit DACs
Figure 8. Bipolar Configuration (-2.048V to +2.048V Output)
12
______________________________________________________________________________________
33µF
Power-Supply Bypassing and
REFIN
REFOUT
AGND
DGND
MAX504
Single-Supply Linearity
-5V
+5V
Ground Management
BIPOFF
VOUT
RFB
V
OUT
DGND and AGND should be connected together at the
chip. For the MAX504 in single-supply applications,
connect V
connection may be achieved by connecting the DAC's
DGND and AGND pins together and connecting that
point to the system analog ground plane. If the DAC's
DGND is connected to the system digital ground, digi-
tal noise may get through to the DAC’s analog portion.
Bypass V
0.1µF ceramic capacitor connected between V
AGND (and between V
short leads close to the device. Ferrite beads may also
be used to further isolate the analog and digital power
supplies.
Figures 11a and 11b illustrate the grounding and
bypassing scheme described.
When the DAC is not being used by the system, mini-
mize power consumption by setting the appropriate
code to minimize load current. For example, in bipolar
mode, with a resistive load to ground, set the DAC
code to mid-scale (see Table 3). If there is no output
load, minimize internal loading on the reference by set-
ting the DAC to all 0s (on the MAX504, use CLR).
Under this condition, REFIN is high impedance and the
op amp operates at its minimum quiescent current.
Due to these low currents, the output settling time for a
zero input code typically increases to 60µs (100µs
max).
Table 3. Bipolar (Offset Binary) Code
Table (-V
* Write 10-bit data words with two sub-LSB 0s because the
DAC input latch is 12 bits wide.
1111
1000
1000
0111
0000
0000
DD
SS
REFIN
INPUT*
1111
0000
0000
1111
0000
0000
to AGND at the chip. The best ground
(and V
to +V
11(00)
01(00)
00(00)
11(00)
00(00)
01(00)
SS
REFIN
SS
in dual-supply mode) with a
and AGND). Mount it with
Output)
(+V
(+V
(-V
(-V
(-V
REFIN
REFIN
REFIN
OUTPUT
REFIN
REFIN
Saving Power
0V
)
)
)
)
)
512
511
512
512
511
512
512
512
1
1
= -V
DD
REFIN
and

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