MAX534BCEE+ Maxim Integrated Products, MAX534BCEE+ Datasheet - Page 13

• Manufacturer Part Number: MAX534BCEE+
• Description: IC DAC QUAD 8BIT 5V LP 16-QSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX534BCEE+

• Settling Time: 8µs
• Number Of Bits: 8
• Data Interface: Serial
• Number Of Converters: 4
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 667mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Number Of Dac Outputs: 4
• Resolution: 8 bit
• Interface Type: Serial (SPI)
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Maximum Power Dissipation: 667 mW
• Minimum Operating Temperature: 0 C
• Supply Current: 800 uA
• Voltage Reference: External
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The output buffer can have a negative input offset volt-
age that would normally drive the output negative, but
since there is no negative supply the output stays at 0V
(Figure 9). When linearity is determined using the end-
point method, it is measured between zero code (all
inputs 0) and full-scale code (all inputs 1) after offset
and gain error are calibrated out. However, in single-
supply operation the next code after zero may not
change the output, so the lowest code that produces a
positive output is the lower endpoint.
The voltage applied to REF should not exceed V
any time. If proper power sequencing is not possible,
connect an external Schottky diode between REF and
V
ratings. Do not apply signals to the digital inputs before
the device is fully powered up.
Connect AGND and DGND together at the IC. This
ground should then return to the highest-quality ground
available. Bypass V
as close to V
Figure 9. Effect of Negative Offset (Single Supply)
__________Applications Information
DD
to ensure compliance with the absolute maximum
NEGATIVE
OFFSET
VOLTAGE
OUTPUT
DD
DAC Linearity and Voltage Offset
0V
and DGND as possible.
______________________________________________________________________________________
DD
and Ground Management
with a 0.1µF capacitor, located
Power-Supply Bypassing
DAC CODE
Power Sequencing
+5V, Low-Power, 8-Bit Quad DAC
with Rail-to-Rail Output Buffers
DD
at
Careful PC board layout minimizes crosstalk among
DAC outputs and digital inputs. Figure 10 shows sug-
gested circuit board layout to minimize crosstalk.
In unipolar operation, the output voltages and the refer-
ence input are the same polarity. Figure 11 shows the
MAX534 unipolar configuration, and Table 2 shows the
unipolar code.
Figure 10. Suggested PC Board Layout for Minimizing
Crosstalk (Bottom View)
Figure 11. Unipolar Output Circuit
NOT SHOWN
INTERFACE
SERIAL
OUTC
OUTD
AGND
MAX534
REFERENCE INPUT
Two-Quadrant Multiplication
DAC D
DAC A
DAC B
DAC C
SYSTEM GND
REFAB
3
AGND
14
Unipolar-Output,
+3V
V
DD
13
DGND
OUTB
OUTA
REF
12
2
1
16
15
OUTA
OUTB
OUTC
OUTD
13