MAX5856AECM+TD Maxim Integrated Products, MAX5856AECM+TD Datasheet
MAX5856AECM+TD
Specifications of MAX5856AECM+TD
Related parts for MAX5856AECM+TD
MAX5856AECM+TD Summary of contents
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... SATCOM, LMDS, MMDS, HFC, DSL, WLAN, Point-to-Point Microwave Links Wireless Base Stations Direct Digital Synthesis Instrumentation/ATE ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. Interpolation Filters and PLL 8-Bit Resolution, Dual DAC ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x Interpolation Filters and PLL ABSOLUTE MAXIMUM RATINGS AGND, DGND, PGND ..........-0. CW, REN, PLLF, PLLEN to AGND, DA7–DA0, DB7–DB0, DGND, PGND........................................................-0.3V to +4V ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x ELECTRICAL CHARACTERISTICS (continued) ( 3V, AGND = DGND = PGND = 1.2V 20mA, output amplitude = 0dB FS, differential output, ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x Interpolation Filters and PLL ELECTRICAL CHARACTERISTICS (continued) ( 3V, AGND = DGND = PGND = 1.2V 20mA, output amplitude = ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x ELECTRICAL CHARACTERISTICS (continued) ( 3V, AGND = DGND = PGND = 1.2V 20mA, output amplitude = 0dB FS, differential output, ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x Interpolation Filters and PLL ELECTRICAL CHARACTERISTICS (continued) ( 3V, AGND = DGND = PGND = 1.2V 20mA, output amplitude = ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x ( 3V, AGND = DGND = PGND = 0, external reference = 1.2V, no interpolation, PLL disabled differential output +25°C, unless otherwise noted.) ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x Interpolation Filters and PLL ( 3V, AGND = DGND = PGND = 0, external reference = 1.2V, no interpolation, PLL disabled differential output ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x ( 3V, AGND = DGND = PGND = 0, external reference = 1.2V, no interpolation, PLL disabled differential output +25°C, unless otherwise noted.) ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x Interpolation Filters and PLL ( 3V, AGND = DGND = PGND = 0, external reference = 1.2V, no interpolation, PLL disabled differential output ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x ( 3V, AGND = DGND = PGND = 0, external reference = 1.2V, no interpolation, PLL disabled differential output +25°C, unless otherwise noted.) ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x Interpolation Filters and PLL PIN NAME 15 DB5 Channel B Input Data Bit 5 16 DB4 Channel B Input Data Bit 4 17 DB3 Channel B Input Data Bit 3 Clock Output/Input. CLK becomes ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/ MAX5856A 8 DA7–DA0 REGISTER 8 DB7–DB0 REGISTER IDE CW Detailed Description The MAX5856A dual, high-speed, 8-bit, current-output DAC provides superior performance in communication systems requiring low-distortion analog-signal recon- struction. The MAX5856A combines ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x Interpolation Filters and PLL Device Power-Up and States of Operation At power-up, the MAX5856A is configured in no-inter- polation mode with a gain adjustment setting of 0dB and a fully operational converter. In shutdown, ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x SINGLE 8-BIT BUS SAVES I/O PINS DIGITAL BASEBAND OFDM PROCESSOR QAM-MAPPER DATA CLOCK OUT f = 71.6MHz DATA Figure 2. Typical Application Circuit Table 4. Benefits of Interpolation OPTION SOLUTION • No interpolation 1 ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x Interpolation Filters and PLL SOLUTION 1 f OUT 20MHz ±10MHz SOLUTION 2 f OUT 20MHz BW = ±10MHz SOLUTION 3 f OUT 20MHz BW = ±10MHz Figure 3. MAX5856A in 4x Interpolation Mode This ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x PLL Clock Multiplier and The MAX5856A features an on-chip PLL clock multipli- er, which generates all internal, synchronized high- speed clock signals required by the input data latches, interpolation filters, and DAC cores. The ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x Interpolation Filters and PLL External Reference To disable the internal reference of the MAX5856A, con- nect REN Apply a temperature-stable, external DD reference to REFO to set the full-scale output (Figure ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x Figure 6 illustrates the DAC write cycle in 4x interpola- tion mode. With the interpolation feature enabled, the device can operate with the PLL enabled or disabled. To obtain best phase noise performance, disable ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x Interpolation Filters and PLL 1 CLKXN t CXD 1 CLKXP 2 CLK DA DA0–DA7 N t DCSR 1. CLKXP AND CLKXN MUST BE PRESENT ONLY WHEN PLL IS DISABLED, WITH PLLEN CONNECTED TO GND. ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x Differential DC-Coupled Configuration Figure 9 shows the MAX5856A output operating in differ- ential DC-coupled mode. This configuration can be used in communication systems employing analog quadrature upconverters and requiring a baseband sampling, dual- channel, ...
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Dual 8-Bit, 300Msps DAC with 4x/2x/1x Interpolation Filters and PLL The MAX5856A is packaged in a 48-pin TQFP-EP package, providing design flexibility, increased thermal efficiency, and optimized AC performance of the DAC. The EP enables the implementation of grounding tech- ...
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... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 23 © 2004 Maxim Integrated Products ...