ADV7123JST240 Analog Devices Inc, ADV7123JST240 Datasheet - Page 20

IC DAC VIDEO TRPL HI SPD 48-LQFP

ADV7123JST240

Manufacturer Part Number
ADV7123JST240
Description
IC DAC VIDEO TRPL HI SPD 48-LQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV7123JST240

Rohs Status
RoHS non-compliant
Settling Time
15ns
Number Of Bits
10
Data Interface
Parallel
Number Of Converters
3
Voltage Supply Source
Single Supply
Power Dissipation (max)
30mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LQFP

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ADV7123
ANALOG SIGNAL INTERCONNECT
Place the ADV7123 as close as possible to the output connec-
tors, thus minimizing noise pickup and reflections due to
impedance mismatch.
The video output signals should overlay the ground plane and
not the analog power plane, thereby maximizing the high
frequency power supply rejection.
INPUTS
VIDEO
DATA
V
AA
39 TO 48
14 TO 23
1 TO 10
0.1µF
35
12
11
24
38
R9 TO R0
G9 TO G0
B9 TO B0
COMP
SYNC
BLANK
CLOCK
PSAVE
ADV7123
GND
25, 26
V
R
V
IOG
IOG
IOR
IOB
IOR
IOB
REF
SET
AA
36
37
34
32
28
33
31
27
Figure 28. Typical Connection Diagram
13, 29,
30
POWER SUPPLY DECOUPLING
(0.1µF AND 0.01µF CAPACITOR
FOR EACH V
75Ω
AD1580
COMPLEMENTARY
OUTPUTS
R
530Ω
Rev. D | Page 20 of 24
SET
75Ω
0.1µF
1
2
AA
GROUP)
75Ω
COAXIAL CABLE
For optimum performance, the analog outputs should each
have a source termination resistance to ground of 75 Ω (doubly
terminated 75 Ω configuration). This termination resistance
should be as close as possible to the ADV7123 to minimize
reflections.
Additional information on PCB design is available in the
AN-333 Application Note, Design and Layout of a Video
Graphics System for Reduced EMI, which is available from
Analog Devices at www.analog.com.
0.01µF
1µF
1kΩ
75Ω
V
CONNECTORS
AA
V
AA
BNC
75Ω
75Ω
75Ω
MONITOR (CRT)

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