ATF1502ASL-25JU44 Atmel, ATF1502ASL-25JU44 Datasheet - Page 6

IC CPLD EE LP 25NS 44-PLCC

ATF1502ASL-25JU44

Manufacturer Part Number
ATF1502ASL-25JU44
Description
IC CPLD EE LP 25NS 44-PLCC
Manufacturer
Atmel
Series
ATF1502AS(L)r
Datasheet

Specifications of ATF1502ASL-25JU44

Programmable Type
In System Programmable (min 10K program/erase cycles)
Delay Time Tpd(1) Max
25.0ns
Voltage Supply - Internal
4.5 V ~ 5.5 V
Number Of Macrocells
32
Number Of I /o
32
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-PLCC
Voltage
4.75 V ~ 5.25 V
Memory Type
EEPROM
Family Name
ATF1502ASL
# Macrocells
32
Number Of Usable Gates
750
Frequency (max)
60MHz
Propagation Delay Time
25ns
Number Of Logic Blocks/elements
2
# I/os (max)
32
Operating Supply Voltage (typ)
5V
In System Programmable
Yes
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
Number Of Product Terms Per Macro
40
Maximum Operating Frequency
60 MHz
Delay Time
25 ns
Number Of Programmable I/os
32
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
For Use With
ATF15XX-DK3 - KIT DEV FOR ATF15XX CPLD'S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Number Of Logic Elements/cells
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATF1502ASL-25JU44
Manufacturer:
Atmel
Quantity:
10 000
Input Diagram
I/O Diagram
Speed/Power
Management
6
ATF1502AS(L)
The ATF1502AS has several built-in speed and power management features. The
ATF1502AS contains circuitry that automatically puts the device into a low-power standby
mode when no logic transitions are occurring. This not only reduces power consumption dur-
ing inactive periods, but also provides proportional power savings for most applications
running at system speeds below 50 MHz. This feature may be selected as a design option.
To further reduce power, each ATF1502AS macrocell has a reduced-power bit feature. This
feature allows individual macrocells to be configured for maximum power savings. This feature
may be selected as a design option.
The ATF1502AS also has an optional power-down mode. In this mode, current drops to below
10 mA. When the power-down option is selected, either PD1 or PD2 pins (or both) can be
used to power down the part. The power-down option is selected in the design source file.
When enabled, the device goes into power-down when either PD1 or PD2 is high. In the
power-down mode, all internal logic signals are latched and held, as are any enabled outputs.
0995K–PLD–6/05

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