ATF1502AS-10AC44 Atmel, ATF1502AS-10AC44 Datasheet - Page 3

IC CPLD 32 MACROCELL 10NS 44TQFP

ATF1502AS-10AC44

Manufacturer Part Number
ATF1502AS-10AC44
Description
IC CPLD 32 MACROCELL 10NS 44TQFP
Manufacturer
Atmel
Series
ATF1502AS(L)r

Specifications of ATF1502AS-10AC44

Programmable Type
In System Programmable (min 10K program/erase cycles)
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
4.75 V ~ 5.25 V
Number Of Macrocells
32
Number Of I /o
32
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-TQFP, 44-VQFP
Voltage
4.75 V ~ 5.25 V
Memory Type
EEPROM
Circuit Type
Electrically Erasable
Logic Function
Programmable
Logic Type
CPLD
Package Type
TQFP-44
Special Features
Security Fuse
Temperature, Operating, Range
0 to +70 °C
Voltage, Supply
5.25 V
For Use With
ATF15XX-DK3 - KIT DEV FOR ATF15XX CPLD'S
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Number Of Logic Elements/cells
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
Other names
ATF1502AS-10AC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATF1502AS-10AC44
Manufacturer:
Atmel
Quantity:
10 000
Block Diagram
0995K–PLD–6/05
32
Each of the 32 macrocells generates a buried feedback that goes to the global bus. Each input
and I/O pin also feeds into the global bus. The switch matrix in each logic block then selects 40
individual signals from the global bus. Each macrocell also generates a foldback logic term
that goes to a regional bus. Cascade logic between macrocells in the ATF1502AS allows fast,
efficient generation of complex logic functions. The ATF1502AS contains four such logic
chains, each capable of creating sum term logic with a fan-in of up to 40 product terms.
The ATF1502AS macrocell, shown in Figure 1, is flexible enough to support highly complex
logic functions operating at high speed. The macrocell consists of five sections: product terms
and product term select multiplexer, OR/XOR/CASCADE logic, a flip-flop, output select and
enable, and logic array inputs.
Unused product terms are automatically disabled by the compiler to decrease power con-
sumption. A security fuse, when programmed, protects the contents of the ATF1502AS. Two
bytes (16 bits) of User Signature are accessible to the user for purposes such as storing
project name, part number, revision or date. The User Signature is accessible regardless of
the state of the security fuse.
The ATF1502AS device is an in-system programmable (ISP) device. It uses the industry stan-
dard 4-pin JTAG interface (IEEE Std. 1149.1), and is fully compliant with JTAG’s Boundary-
scan Description Language (BSDL). ISP allows the device to be programmed without remov-
ing it from the printed circuit board. In addition to simplifying the manufacturing flow, ISP also
allows design modifications to be made in the field via software.
B
ATF1502AS(L)
3

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