ADSP-2186KST-133 Analog Devices Inc, ADSP-2186KST-133 Datasheet - Page 28

IC DSP CONTROLLER 16BIT 100LQFP

ADSP-2186KST-133

Manufacturer Part Number
ADSP-2186KST-133
Description
IC DSP CONTROLLER 16BIT 100LQFP
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr
Datasheet

Specifications of ADSP-2186KST-133

Rohs Status
RoHS non-compliant
Interface
Host Interface, Serial Port
Clock Rate
33.3MHz
Non-volatile Memory
External
On-chip Ram
40kB
Voltage - I/o
5.00V
Voltage - Core
5.00V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Device Core Size
16b
Architecture
Enhanced Harvard
Format
Fixed Point
Clock Freq (max)
33.3MHz
Mips
33.3
Device Input Clock Speed
33.3MHz
Ram Size
40KB
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / Rohs Status
Not Compliant

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ADSP-2186
CAPACITIVE LOADING
Figures 24 and 25 show the capacitive loading characteristics of
the ADSP-2186.
TEST CONDITIONS
Output Disable Time
Output pins are considered to be disabled when they have
stopped driving and started a transition from the measured
output high or low voltage to a high impedance state. The out-
put disable time (t
as shown in the Output Enable/Disable diagram. The time is the
interval from when a reference signal reaches a high or low
voltage level to when the output voltages have changed by 0.5 V
from the measured output high or low voltage. The decay time,
t
load, i
lowing equation:
from which
DECAY
NOMINAL
L
, is dependent on the capacitive load, C
, on the output pin. It can be approximated by the fol-
30
25
20
15
10
5
0
0
18
16
14
12
10
–2
–4
–6
8
6
4
2
T = +85 C
V
0
DD
= 4.5V
50
DIS
t
DIS
) is the difference of t
50
t
DECAY
= t
100
MEASURED
=
100
C
150
C
L
– pF
L
C
L
× 0.5V
– pF
i
– t
L
150
200
DECAY
MEASURED
L
250
, and the current
200
and t
300
250
DECAY
,
is calculated. If multiple pins (such as the data bus) are dis-
abled, the measurement value is that of the last pin to stop
driving.
Output Enable Time
Output pins are considered to be enabled when that have made
a transition from a high-impedance state to when they start
driving. The output enable time (t
a reference signal reaches a high or low voltage level to when the
output has reached a specified high or low trip point, as shown
in the Output Enable/Disable diagram. If multiple pins (such as
the data bus) are enabled, the measurement value is that of the
first pin to start driving.
REFERENCE
(MEASURED)
(MEASURED)
OUTPUT
OUTPUT
SIGNAL
INPUT
OR
V
OUTPUT
V
OL
OH
OUTPUT STOPS
PIN
t
TO
MEASURED
t
DIS
DRIVING
1.5V
50pF
HIGH-IMPEDANCE STATE. TEST CONDITIONS CAUSE
THIS VOLTAGE LEVEL TO BE APPROXIMATELY 1.5V.
V
V
OH
OL
t
DECAY
(MEASURED) + 0.5V
(MEASURED) – 0.5V
ENA
I
I
OH
OL
) is the interval from when
OUTPUT STARTS
1.0V
2.0V
t
DRIVING
ENA
+1.5V
1.5V
V
(MEASURED)
V
(MEASURED)
OH
OL

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