XC5VLX110T-3FFG1738C Xilinx Inc, XC5VLX110T-3FFG1738C Datasheet - Page 324

IC FPGA VIRTEX-5 110K 1738FBGA

XC5VLX110T-3FFG1738C

Manufacturer Part Number
XC5VLX110T-3FFG1738C
Description
IC FPGA VIRTEX-5 110K 1738FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr

Specifications of XC5VLX110T-3FFG1738C

Number Of Logic Elements/cells
110592
Number Of Labs/clbs
8640
Total Ram Bits
5455872
Number Of I /o
680
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1738-BBGA, FCBGA
For Use With
HW-V5-ML523-FXT-UNI-G-J - BOARD EVAL FOR VIRTEX-5HW-V5-ML523-FXT-UNI-G - BOARD EVAL FOR VIRTEX-5HW-V5-ML523-UNI-G - EVALUATION PLATFORM VIRTEX-5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

Available stocks

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Manufacturer
Quantity
Price
Part Number:
XC5VLX110T-3FFG1738C
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XILINX
Quantity:
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Part Number:
XC5VLX110T-3FFG1738C
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Quantity:
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Part Number:
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0
Chapter 7: SelectIO Logic Resources
324
Table 7-5: ILOGIC Switching Characteristics
Note:
parameters.
Setup/Hold
T
T
T
Combinatorial
T
Sequential Delays
T
T
T
T
ICE1CK
ISRCK
IDOCK
IDI
IDLO
ICKQ
ICE1Q
RQ
Symbol
The DDLY timing diagrams and parameters are identical to the D timing diagrams and
/T
/T
/T
ICKSR
IOCKD
ICKCE1
CE1 pin Setup/Hold with respect to CLK
SR/REV pin Setup/Hold with respect to CLK
D pin Setup/Hold with respect to CLK
D pin to O pin propagation delay, no Delay
D pin to Q1 pin using flip-flop as a latch without Delay
CLK to Q outputs
CE1 pin to Q1 using flip-flop as a latch, propagation delay
SR/REV pin to OQ/TQ out
www.xilinx.com
Description
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010

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