XC4028XL-09HQ240C Xilinx Inc, XC4028XL-09HQ240C Datasheet

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XC4028XL-09HQ240C

Manufacturer Part Number
XC4028XL-09HQ240C
Description
IC FPGA C-TEMP 3.3V 240-HQFP
Manufacturer
Xilinx Inc
Series
XC4000E/Xr
Datasheet

Specifications of XC4028XL-09HQ240C

Number Of Logic Elements/cells
2432
Number Of Labs/clbs
1024
Total Ram Bits
32768
Number Of I /o
193
Number Of Gates
28000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-BFQFP Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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XC4000XL Electrical Specifications
Definition of Terms
In the following tables, some specifications may be designated as Advance or Preliminary. These terms are defined as
follows:
Advance:
Preliminary:
Unmarked:
Except for pin-to-pin input and output parameters, the a.c. parameter delay specifications included in this document are
derived from measuring internal test patterns. All specifications are representative of worst-case supply voltage and junction
temperature conditions.
All specifications subject to change without notice.
XC4000XL D.C. Characteristics
Absolute Maximum Ratings
Recommended Operating Conditions
DS005 (v. 1.8 October 18, 1999 - Product Specification
Notes:
Symbol
Note 1: Maximum DC excursion above V
Note:
V
V
T
V
T
T
V
V
V
CC
V
IN
IH
STG
T
IL
SOL
CCt
CC
TS
IN
J
achieve. During transitions, the device pins may undershoot to -2.0 V or overshoot toV
undershoot lasts less than 10 ns and with the forcing current being limited to 200 mA.
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under
Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended
periods of time may affect device reliability.
At junction temperatures above those listed above, all delay parameters increase by 0.35% per C.
Input and output measurement threshold is ~50% of V
Supply voltage relative to Gnd, T
Supply voltage relative to Gnd, T
High-level input voltage
Low-level input voltage
Input signal transition time
R
Supply voltage relative to Ground
Input voltage relative to Ground (Note 1)
Voltage applied to 3-state output (Note 1)
Longest Supply Voltage Rise Time from 1 V to 3V
Storage temperature (ambient)
Maximum soldering temperature (10 s @ 1/16 in. = 1.5 mm)
Junction Temperature
Initial estimates based on simulation and/or extrapolation from other speed grades, devices, or
devicefamilies. Values are subject to change. Use as estimates, not for production.
Based on preliminary characterization. Further changes are not expected.
Specifications not identified as either Advance or Preliminary are to be considered Final.
XC4000E and XC4000X Series Field Programmable Gate Arrays
cc
Description
or below Ground must be limited to either 0.5 V or 10 mA, whichever is easier to
J
J
= -40 C to +100 C Industrial
Description
= 0 C to +85 C
CC
.
Commercial
Ceramic packages
Plastic packages
50% of V
CC
+2.0 V, provided this over or
Min
3.0
3.0
0
CC
-65 to +150
-0.5 to 4.0
-0.5 to 5.5
-0.5 to 5.5
+260
+150
+125
30% of V
50
Max
250
3.6
3.6
5.5
CC
Units
Units
ms
V
V
V
ns
C
C
C
C
V
V
V
V
6-73
6

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XC4028XL-09HQ240C Summary of contents

Page 1

R XC4000E and XC4000X Series Field Programmable Gate Arrays XC4000XL Electrical Specifications Definition of Terms In the following tables, some specifications may be designated as Advance or Preliminary. These terms are defined as follows: Advance: Initial estimates based on simulation ...

Page 2

XC4000E and XC4000X Series Field Programmable Gate Arrays D.C. Characteristics Over Recommended Operating Conditions Symbol High-level output voltage @ High-level output voltage @ I Low-level output voltage @ Low-level output voltage @ I V ...

Page 3

... Device Min Max T XC4002XL 0.3 2.1 GLS XC4005XL 0.4 2.7 XC4010XL 0.5 3.2 XC4013XL 0.6 3.6 XC4020XL 0.7 4.0 XC4028XL 0.9 4.4 XC4036XL 1.1 4.8 XC4044XL 1.2 5.3 XC4052XL 1.3 5.7 XC4062XL 1.4 6.3 XC4085XL 1.6 7.2 All devices are 100% -2 ...

Page 4

... Max T XC4002XL 0.5 2.8 GE XC4005XL 0.7 3.1 XC4010XL 0.7 3.5 XC4013XL 0.7 3.8 XC4020XL 0.8 4.1 XC4028XL 0.9 4.4 XC4036XL 0.9 4.7 XC4044XL 1.0 5.1 XC4052XL 1.1 5.5 XC4062XL 1.2 5.9 XC4085XL 1.3 6.8 DS005 (v. 1.8 October 18, 1999 - Product Specification ...

Page 5

R XC4000E and XC4000X Series Field Programmable Gate Arrays XC4000XL CLB Characteristics Testing of switching parameters is modeled after testing methods specified by MIL standards. functionally tested. Internal timing parameters are derived from measuring internal test patterns. Listed below are ...

Page 6

XC4000E and XC4000X Series Field Programmable Gate Arrays CLB Single-Port RAM Synchronous (Edge-Triggered) Write Operation Guidelines Testing of switching parameters is modeled after testing methods specified by MIL standards. functionally tested. Internal timing parameters are derived from measuring internal test ...

Page 7

R XC4000E and XC4000X Series Field Programmable Gate Arrays CLB Dual-Port RAM Synchronous (Edge-Triggered) Write Operation Guidelines Testing of switching parameters is modeled after testing methods specified by MIL standards. functionally tested. Internal timing parameters are derived from measuring internal ...

Page 8

... Symbol Device Min Max T XC4002XL 1.2 7.1 ICKOF XC4005XL 1.3 7.7 XC4010XL 1.4 8.2 XC4013XL 1.5 8.6 XC4020XL 1.6 9.0 XC4028XL 1.8 9.4 XC4036XL 2.0 9.8 XC4044XL 2.1 10.3 XC4052XL 2.2 10.7 XC4062XL 2.3 11.3 XC4085XL 2.5 12.2 T All Devices 0.5 3 ...

Page 9

... Max T XC4002XL 1.3 7.8 ICKEOF XC4005XL 1.5 8.1 XC4010XL 1.6 8.5 XC4013XL 1.6 8.8 XC4020XL 1.7 9.1 XC4028XL 1.7 9.4 XC4036XL 1.8 9.7 XC4044XL 1.9 10.1 XC4052XL 2.0 10.5 XC4062XL 2.0 10.9 XC4085XL 2.2 11.8 threshold with 50 pF external capacitive load. For different loads, see Figure 60. ...

Page 10

... XC4002XL 6.8 / 0.0 PSD PHD XC4005XL 8.8 / 0.0 XC4010XL 9.0 / 0.0 XC4013XL* 6.4 / 0.0 XC4020XL 8.8 / 0.0 XC4028XL 9.3 / 0.0 XC4036XL* 6.6 / 0.0 XC4044XL 10.6 / 0.0 XC4052XL 11.2 / 0.0 XC4062XL* 6.8 / 0.0 XC4085XL 12.7 / 0.0 DS005 (v. 1.8 October 18, 1999 - Product Specification ...

Page 11

... XC4005XL 10.8 / 0.0 9.4 / 0.0 XC4010XL 10.3 / 0.0 9.0 / 0.0 XC4013XL* 10.0 / 0.0 8.7 / 0.0 XC4020XL 12.0 / 0.0 10.4 / 0.0 XC4028XL 12.6 / 0.0 11.0 / 0.0 XC4036XL* 12.2 / 0.0 10.6 / 0.0 XC4044XL 13.8 / 0.0 12.0 / 0.0 XC4052XL 14.1 / 0.0 12.3 / 0.0 XC4062XL* 13 ...

Page 12

... XC4002XL 5.9 / 0.0 XC4005XL 10.8 / 0.0 PHED XC4010XL 10.3 / 0.0 XC4013XL* 10.0 / 0.0 XC4020XL 12.0 / 0.0 10.4 / 0.0 XC4028XL 12.6 / 0.0 11.0 / 0.0 XC4036XL* 12.2 / 0.0 10.6 / 0.0 XC4044XL 13.8 / 0.0 12.0 / 0.0 XC4052XL 14.1 / 0.0 12.3 / 0.0 XC4062XL* 13 ...

Page 13

... All Devices 0 T All devices 19.8 MRW Max T XC4002XL 9.8 RRI* XC4005XL 11.3 XC4010XL 13.9 XC4013XL 15.9 XC4020XL 18.6 XC4028XL 20.5 XC4036XL 22.5 XC4044XL 25.1 XC4052XL 27.2 XC4062XL 29.1 XC4085XL 34.4 T All devices 1.6 PID T XC4002XL 4.7 PLI XC4013, 36, 62XL 3 ...

Page 14

... Clock Enable (EC) to clock (OK) hold time Global Set/Reset Minimum GSR pulse width Delay from GSR input to any Pad XC4002XL XC4005XL XC4010XL XC4013XL XC4020XL XC4028XL XC4036XL XC4044XL XC4052XL XC4062XL XC4085XL Slew Rate Adjustment For output SLOW option add Note: Output timing is measured at ~50 Indicates Minimum Amount of Time to Assure Valid Data ...

Page 15

R XC4000E and XC4000X Series Field Programmable Gate Arrays Revision Control Version 2/1/99 (1.5) Release included in the 1999 data book, section 6 5/14/99 (1.6) Replaced Electrical Specification and pinout pages for E, EX, and XL families with separate updates ...

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