ATF22V10CQZ-20SU Atmel, ATF22V10CQZ-20SU Datasheet - Page 5

• Manufacturer Part Number: ATF22V10CQZ-20SU
• Description: IC PLD 20NS "QZ" POWER 24-SOIC
• Manufacturer: Atmel

Specifications of ATF22V10CQZ-20SU

• Programmable Type: EE PLD
• Number Of Macrocells: 10
• Voltage - Input: 5V
• Speed: 20ns
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Logic Family: ATF22V10CQZ
• Maximum Operating Frequency: 50 MHz
• Number Of Programmable I/os: 10
• Delay Time: 20 ns
• Operating Supply Voltage: 5 V
• Supply Current: 80 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Product Terms Per Macro: 16
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0778L–PLD–8/10
4.4
4.4.1
4.4.2
4.5
4.6
4.7
Input Test Waveforms
Input Test Waveforms and Measurement Levels
Output Test Loads
Note:
Pin Capacitance
Table 4-1.
Note:
Power-up Reset
The registers in the Atmel
from V
buffer.
This feature is critical for state machine initialization. However, due to the asynchronous nature of reset and the
uncertainty of how V
Preload of Register Outputs
The ATF22V10CZ/CQZ’s registers are provided with circuitry to allow loading of each register with either a high or
a low. This feature will simplify testing since any state can be forced into the registers to control test sequencing. A
JEDEC file with preload is generated when a source file with vectors is compiled. Once downloaded, the JEDEC
file preload sequence will be done automatically by most of the approved programmers after the programming.
C
C
1. The V
2. The clock must remain stable during T
3. After T
IN
I/O
CC
Similar competitors devices are specified with slightly different loads. These load differences may affect output signals’
delay and slew rate. Atmel devices are tested with sufficient margins to meet compatible device specification
conditions.
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested
crossing V
CC
PR
Pin Capacitance (f = 1MHz, T = 25C
rise must be monotonic and start below 0.7V
occurs, all input and feedback setup times must be met before driving the clock pin high
Typ
8
8
RST
CC
, all registers will be reset to the low state. The output state will depend on the polarity of the
actually rises in the system, the following conditions are required:
®
Max
ATF22V10CZ/CQZ are designed to reset during power-up. At a point delayed slightly
10
10
Units
pF
pF
PR
(1)
V
V
OUT
IN
Conditions
= 0V; f = 1.0MHz
= 0V; f = 1.0MHz
Atmel ATF22V10C(Q)Z
5