DS18S20+T&R Maxim Integrated Products, DS18S20+T&R Datasheet - Page 14

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DS18S20+T&R

Manufacturer Part Number
DS18S20+T&R
Description
Board Mount Temperature Sensors Prgmble Resolution 1-Wire Parasite Pwr
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS18S20+T&R

Full Temp Accuracy
+/- 2 C
Package / Case
TO-92
Digital Output - Bus Interface
Serial (1-Wire)
Digital Output - Number Of Bits
9 bit
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Output Type
Digital
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
READ-TIME SLOTS
The DS18S20 can only transmit data to the master when the master issues read-time slots. Therefore, the
master must generate read-time slots immediately after issuing a Read Scratchpad [BEh] or Read Power
Supply [B4h] command, so that the DS18S20 can provide the requested data. In addition, the master can
generate read-time slots after issuing Convert T [44h] or Recall E
of the operation as explained in the DS18S20 Function Commands section.
All read-time slots must be a minimum of 60µs in duration with a minimum of a 1µs recovery time
between slots. A read-time slot is initiated by the master device pulling the 1-Wire bus low for a
minimum of 1µs and then releasing the bus (see Figure 11). After the master initiates the read-time slot,
the DS18S20 will begin transmitting a 1 or 0 on bus. The DS18S20 transmits a 1 by leaving the bus high
and transmits a 0 by pulling the bus low. When transmitting a 0, the DS18S20 will release the bus by the
end of the time slot, and the bus will be pulled back to its high idle state by the pullup resister. Output
data from the DS18S20 is valid for 15µs after the falling edge that initiated the read-time slot. Therefore,
the master must release the bus and then sample the bus state within 15µs from the start of the slot.
Figure 12 illustrates that the sum of T
Figure 13 shows that system timing margin is maximized by keeping T
and by locating the master sample time during read-time slots towards the end of the 15µs period.
Figure 11. Read/Write Time Slot Timing Diagram
1-WIRE BUS
1-WIRE BUS
V
GND
V
GND
PU
PU
> 1µs
OF SLOT
START
15µs
15µs
MASTER WRITE “0” SLOT
MASTER READ “0” SLOT
60µs < T
MIN
Master samples
15µs
LINE TYPE LEGEND
DS18S20 Samples
X
“0” < 120µs
TYP
INIT
Bus master pulling low
Resistor pullup
45µs
, T
RC
30µs
, and T
14 of 23
MAX
> 1 µs
SAMPLE
OF SLOT
START
must be less than 15µs for a read-time slot.
15µs
15µs
1µs < T
1µs < T
2
[B8h] commands to find out the status
DS18S20 pulling low
MASTER WRITE “1” SLOT
> 1µs
MASTER READ “1” SLOT
REC
REC
MIN
INIT
<
<
Master samples
15µs
and T
DS18S20 Samples
TYP
RC
as short as possible
30µs
MAX
DS18S20

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