CY7C63801-SXC Cypress Semiconductor Corp, CY7C63801-SXC Datasheet - Page 17

• Manufacturer Part Number: CY7C63801-SXC
• Description: IC USB PERIPHERAL CTRLR 16-SOIC
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr
• Type: USB Peripheral Controllerr

Specifications of CY7C63801-SXC

• Package / Case: 16-SOIC (3.9mm Width)
• Controller Type: USB Peripheral Controller
• Interface: USB
• Voltage - Supply: 4 V ~ 5.5 V
• Current - Supply: 40mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Mounting Style: SMD/SMT
• Operating Temperature Range: 0 C to + 70 C
• Supply Current: 40 mA
• Operating Supply Voltage: 4 V to 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2256-5; CY7C63801-SXC

Document 38-08035 Rev. *N
9.5.3 WriteBlock Function
The WriteBlock function is used to store data in the flash. Data
is moved 64 bytes at a time from SRAM to flash using this
function. The WriteBlock function first checks the protection bits
and determines if the desired BLOCKID is writable. If write
protection is turned on, the WriteBlock function exits setting the
accumulator and KEY2 back to 00h. KEY1 has a value of 01h,
indicating a write failure. The configuration of the WriteBlock
function is straightforward. The BLOCKID of the flash block,
where the data is stored, must be determined and stored at
SRAM address FAh.
The SRAM address of the first of the 64 bytes to be stored in
flash must be indicated using the POINTER variable in the
parameter block (SRAM address FBh). Finally, the CLOCK and
DELAY value must be set correctly. The CLOCK value deter-
mines the length of the write pulse that is used to store the data
in the flash. The CLOCK and DELAY values are dependent on
the CPU speed and must be set correctly.
Table 9-5. WriteBlock Parameters
9.5.4 EraseBlock Function
The EraseBlock function is used to erase a block of 64
contiguous bytes in flash. The EraseBlock function first checks
the protection bits and determines if the desired BLOCKID is
writable. If write protection is turned on, the EraseBlock function
exits setting the accumulator and KEY2 back to 00h. KEY1 has
a value of 01h, indicating a write failure. The EraseBlock function
is only useful as the first step in programming. When a block is
erased, the data in the block is not one hundred percent
unreadable. If the objective is to obliterate data in a block, the
best method is to perform an EraseBlock followed by a Write-
Block of all zeros.
To set up the parameter block for the EraseBlock function,
correct key values must be stored in KEY1 and KEY2. The block
number to be erased must be stored in the BLOCKID variable
and the CLOCK and DELAY values must be set based on the
current CPU speed.
KEY1
KEY2
BLOCKID
POINTER
CLOCK
DELAY
Name
Address
0,FBh
0,FCh
0,FEh
0,F8h
0,F9h
0,FAh
3Ah
Stack Pointer value, when SSC is
executed.
8KB flash block number (00h–7Fh)
4KB flash block number (00h–3Fh)
3KB flash block number (00h–2Fh)
First of 64 addresses in SRAM, where
the data to be stored in flash is
located before calling WriteBlock.
Clock divider used to set the write
pulse width.
For a CPU speed of 12 MHz set to
56h.
Description
Table 9-6. EraseBlock Parameters
9.5.5 ProtectBlock Function
The enCoRe II devices offer flash protection on a block by block
basis.
ER and EW indicate the ability to perform external reads and
writes. For internal writes, IW is used. Internal reading is
permitted by way of the ROMX instruction. The ability to read by
way of the SROM ReadBlock function is indicated by SR. The
protection level is stored in two bits according to
These bits are bit packed into the 64 bytes of the protection
block. As a result, each protection block byte stores the
protection level for four flash blocks. The bits are packed into a
byte, with the lowest numbered block’s protection level stored in
the lowest numbered bits
The first address of the protection block contains the protection
level for blocks 0 through 3; the second address is for blocks 4
through 7. The 64th byte stores the protection level for blocks
252 through 255.
Table 9-7. Protection Modes
The level of protection is only decreased by an EraseAll, which
places zeros in all locations of the protection block. To set the
level of protection, the ProtectBlock function is used. This
function takes data from SRAM, starting at address 80h, and
ORs it with the current values in the protection block. The result
of the OR operation is then stored in the protection block. The
EraseBlock function does not change the protection level for a
block. Because the SRAM location for the protection data is fixed
and there is only one protection block per flash macro, the
ProtectBlock function expects very few variables in the
parameter block to be set before calling the function. The
parameter block values that must be set, besides the keys, are
the CLOCK and DELAY values.
KEY1
KEY2
BLOCKID
CLOCK
DELAY
Mode
00b
01b
10b
Block n+3
11b
Name
7
Table 9-7
SR ER EW IW Unprotected
SR ER EW IW Read protect
SR ER EW IW Disable external
SR ER EW IW Disable internal
6
Settings
0,F8h
0,F9h
0,FAh
0,FCh
0,FEh
Address
lists the protection modes available. In this table,
Block n+2
5
CY7C63310, CY7C638xx
3Ah
Stack Pointer value, when SSC is
executed.
flash block number (00h–7Fh)
Clock divider used to set the erase
pulse width.
For a CPU speed of 12 MHz set to
56h
write
write
Table
4
Description
9-7.
Block n+1
3
Description
2
Unprotected
Factory upgrade
Field upgrade
Full protection
Marketing
Table
Page 17 of 86
1
Block n
9-7.
0
[+] Feedback