KSZ8873RLL Micrel Inc, KSZ8873RLL Datasheet - Page 30

• Manufacturer Part Number: KSZ8873RLL
• Description: IC ETHERNET SWITCH 3PORT 64-LQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8873RLL

• Data Rate: 100Mbps
• Controller Type: Ethernet Switch Controller
• Interface: RMII
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• No. Of Ports: 3
• Ethernet Type: IEEE 802.3u
• Supply Current: 115mA
• Supply Voltage Range: 2.5V, 3.3V
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Svhc: No SVHC (15-Dec-2010)
• Base: RoHS Compliant
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Fiber Support: No
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 1.89/3.465V
• Operating Temperature Classification: Commercial
• Interface Type: MII, RMII
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-3461

Micrel, Inc.
The KSZ8873RLL filters error frames, and thus does not implement the RX_ER output signal. To detect error frames from
RMII PHY devices, the SMTXER3 input signal of the KSZ8873RLL is connected to the RXER output signal of the RMII
PHY device.
Collision detection is implemented in accordance with the RMII Specification.
In RMII mode, tie MII signals, SMTXD3[3:2] and SMTXER3, to ground if they are not used.
The KSZ8873RLL RMII can interface with RMII PHY and RMII MAC devices. The latter allows two KSZ8873RLL devices
to be connected back-to-back. The following table shows the KSZ8873RLL RMII pin connections with an external RMII
PHY and an external RMII MAC, such as another KSZ8873RLL device.
September 2009
RMII
Signal Name
REF_CLK
CRS_DV
RXD1
RXD0
TX_EN
TXD1
TXD0
RX_ER
---
KSZ8873RLL
PHY-MAC Connections
External
PHY Signals
REF_CLK
TX_EN
TXD1
TXD0
CRS_DV
RXD1
RXD0
RX_ER
Direction
(with respect
to the PHY)
Input
Output
Output
Output
Input
Input
Input
Output
---
KSZ8873RLL
MAC Signals
REFCLKI_3
SMRXDV3
SMRXD31
SMRXD30
SMTXEN3
SMTXD31
SMTXD30
SMTXER3
Direction
(with respect
to the MAC)
Input or
Output
Input
Input
Input
Output
Output
Output
Input
(not required)
---
Table 7. RMII Signal Connections
Table 6. RMII Signal Description
Pin
Descriptions
Reference Clock
Carrier sense/
Receive data valid
Receive data bit 1
Receive data bit 0
Transmit enable
Transmit data bit 1
Transmit data bit 0
Receive error
RMII
Signal Description
Synchronous 50 MHz clock
reference for receive, transmit
and control interface
Carrier sense/
Receive data valid
Receive data bit 1
Receive data bit 0
Transmit enable
Transmit data bit 1
Transmit data bit 0
Receive error
---
30
KSZ8873RLL
MAC-MAC Connections
KSZ8873RLL
MAC Signals
REFCLKI_3
SMRXDV3
SMRXD31
SMRXD30
SMTXEN3
SMTXD31
SMTXD30
(not used)
KSZ8873RLL
RMII Signal (direction)
REFCLKI_3 (input)
SMRXDV3 (output)
SMRXD31 (output)
SMRXD30 (output)
SMTXEN3 (input)
SMTXD31 (input)
SMTXD30 (input)
(not used)
SMTXER3* (input)
* Connects to RX_ER signal
of RMII PHY device
External
MAC Signals
REF_CLK
CRS_DV
RXD1
RXD0
TX_EN
TXD1
TXD0
(not used)
KSZ8873MLL/FLL/RLL
M9999-092309-1.2