CY7C68300B-56LFXC Cypress Semiconductor Corp, CY7C68300B-56LFXC Datasheet
CY7C68300B-56LFXC
Specifications of CY7C68300B-56LFXC
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CY7C68300B-56LFXC Summary of contents
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... Features (CY7C68300B/CY7C68301B only) • Pin-compatible with CY7C68300A (using Backward Compatibility mode) • Lead-free 56-pin SSOP and 56-pin QFN packages • CY7C68301B is ideal for battery-powered designs • CY7C68300B is ideal for self- and bus-powered designs SCL I2C Bus Controller SDA PLL Internal Control Logic ...
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... The CY7C68300B/301B and CY7C68320/321 are available in three package types that are pictured in the following sections. As mentioned above, the CY7C68300B/301B contains a backward CY7C68300B/301B to be used in existing EZ-USB AT2 (CY7C68300A) designs. Please refer to the logic flow below for more information on the pinout selection process. Read EEPROM ...
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... SDA 23 24 VCC DD0 25 DD1 26 27 DD2 DD3 28 Figure 5-2. 56-pin SSOP Pinout (CY7C68300B/CY7C68301B only) Document 38-08033 Rev. *D (ATA_EN) VBUS_ATA_ENABLE (VBUS_PWR_VALID ) DA2 EZ-USB AT2LP CY7C68300B CY7C68301B 56-pin SSOP NOTE: Labels in italics denote pin functionality during CY7C68300A compatibility mode. CY7C68300B/CY7C68301B CY7C68320/CY7C68321 DD12 ...
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... VCC 7 DPLUS 8 DMINUS 9 GND 10 VCC 11 GND 12 NOTE: Italic labels denote pin functionality (PU 10K) PWR500# 13 GND 14 Figure 5-3. 56-pin QFN Pinout (CY7C68300B/CY7C68301B) Document 38-08033 Rev. *D EZ-USB AT2LP CY7C68300B CY7C68301B 56-pin QFN during CY7C68300A compatibility mode. CY7C68300B/CY7C68301B CY7C68320/CY7C68321 42 RESET# 41 GND 40 ARESET# 39 DA2 ( VBUS_PWR_VALID) ...
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... XTALOUT 4 XTALIN 5 AGND 6 VCC 7 DPLUS 8 DMINUS 9 GND 10 VCC 11 GND 12 GPIO1 13 GND 14 Figure 5-4. 56-pin QFN Pinout (CY7C68320/CY7C68321) Document 38-08033 Rev. *D EZ-USB AT2LP CY7C68320 CY7C68321 56-pin QFN CY7C68300B/CY7C68301B CY7C68320/CY7C68321 42 RESET# 41 GND 40 ARESET# 39 DA2 38 CS1# 37 CS0# 36 GPIO0 35 DA1 34 DA0 33 INTRQ 32 VCC 31 DMACK# 30 DIOR# ...
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... GND 19 VCC 20 GND 21 SYSIRQ 22 GND 23 GND 24 25 GND PWR500# 26 GND SCL 29 30 SDA Figure 5-5. 100-pin TQFP Pinout (CY7C68320/CY7C68321 only) Document 38-08033 Rev. *D CY7C68300B/CY7C68301B VBUS_ATA_ENABLE EZ-USB AT2LP CY7C68320B CY7C68321B 100-pin TQFP CY7C68320/CY7C68321 DD8 80 79 VCC 78 RESET GND 75 ARESET# 74 DA2 73 CS1# 72 CS0# 71 ...
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... Tie to GND if functionality is not used. GND Ground. [2] I/O Active LOW. VBUS power granted indicator used in bus-powered designs (see section 5.3.11). Alternate Function for 68320. Reserved. Tie to GND. CY7C68300B/CY7C68301B CY7C68320/CY7C68321 Pin Description . Connect to 3.3V power source Connect to V through the shortest path CC CC ...
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... Input Bus-powered operation selector. Used in systems that are capable of being bus or self-powered to indicate the current power mode Connect. GND Ground. CY7C68300B/CY7C68301B CY7C68320/CY7C68321 Pin Description 2 C interface (see section 5.3.2 interface (see section 5.3.2). . Connect to 3.3V power source. . Connect to 3.3V power source. ...
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... GND CC through a 0.1-µF capacitor, supplying a 10-ms reset. PWR V . Connect to 3.3V power source Input VBUS detection (see section 5.3.9). Indicates to the CY7C68300B/CY7C68301B that VBUS power is present. [1] I/O Hi-Z ATA Data bit 8. [1] I/O Hi-Z ATA Data bit 9. ...
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... Figure 5-7 depicts the latching algorithm incorporated by AT2LP. The SYSIRQ pin must be tied low if the HID function is used (refer to Section 6.0). 24MHz Xtal XTALIN Figure 5-6. XTALIN / XTALOUT Diagram CY7C68300B/CY7C68301B CY7C68320/CY7C68321 12pF XTALOUT USB Interrupt Data Byte Page ...
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... DRVPWRVLD When this pin is enabled via EEPROM byte 8, bit 0, the AT2LP will inform the host that a removable device, such card, is present. The CY7C68300B/CY7C68301B will use DRVPWRVLD to detect that the removable device is present. Pin polarity is controlled by bit 1 of EEPROM address 8. When DRVPWRVLD is deasserted, the AT2LP will report a “no media present” ...
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... Table 6- when Config = 0 0 when Config = 1 used 1 EEPROM value used CY7C68300B/CY7C68301B CY7C68320/CY7C68321 RESET# through a 100k resistor, and to GND CC 100KΩ Ω Ω Ω RESET# 0.1µ µ µ µ F Figure 5-8. Typical Reset Circuit / SX2 Reset and Power Considerations at ™ ...
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... The following table and text defines the fields of the ATACB. Field Description This field indicates to the CY7C68300B/CY7C68301B that the ATACB contains a vendor-specific command block. This value of this field must match the value in EEPROM address 0x04 for this vendor-specific command to be recognized. ...
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... Reserved Document 38-08033 Rev. *D CY7C68300B/CY7C68301B Field Description Bit 1 DeviceSelectionOverride – This bit determines when the device selection will be performed in relation to the command register write accesses Device selection will be performed prior to command register write accesses 1 = Device selection will be performed following command register write accesses Bit 0 TaskFileRead – ...
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... EEPROM and checks to see if the ATA connector is configured for Board Manufacturing Test Mode. AT2LP then selects an operating mode as shown below. 2 • EEPROM with a 0x4D4D signature is found, the CY7C68300B/CY7C68301B uses the same pinout and EE- PROM format as the CY7C68300A (EZ-USB AT2). Document 38-08033 Rev. *D "No EEPROM Detected" No EEPROM ...
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... Byte 1 must be set to 0x26 to identify CfgCB. Byte 2 is reserved and must be set to zero. Byte 3 is used to determine the memory source to write/read. For the CY7C68300B/CY7C68301B, this byte must be set to 0x02, indicating the EEPROM is present. Bytes 4 and 5 are used to determine the start address. For the CY7C68300B/301B, this must always be 0x0000 ...
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... Reserved (must be zero 8.4.2.1 Mfg_load During a mfg_load, the CY7C68300B/CY7C68301B goes into Manufacturing Test Mode. Manufacturing Test Mode is provided as a means to implement board or system level inter- connect tests. During Manufacturing Test Mode operation, all outputs not directly associated with USB operation are control- lable ...
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... A1=0, A2=1) for memories that are internally byte- addressed memories. Note: Devices running in Backward Compatibility Mode should use the 68300A EEPROM organization, and not the 68300B/301B/320/321 format shown in this document. Figure 8-2. “AT2LP Blaster” Tool Screen CY7C68300B/CY7C68301B CY7C68320/CY7C68321 Page ...
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... Bit (3) Enables a delay 120 ms at each read of the DRQ bit where the device data length does not match the host data length. This allows the CY7C68300B/CY7C68301B to work with most devices that incorrectly clear the BUSY bit before a valid status is present. Bit (2) Determines if a short packet is sent prior to the STALL endpoint ...
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... CF readers) will set this bit to 0. Systems with one removable device and one non- removable device will set this bit to 1. Bit (5) Package Select. Set this bit to 1 when using the 100-pin device. CY7C68300B/CY7C68301B CY7C68320/CY7C68321 Required Suggested Contents Contents ...
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... This bit tells the AT2LP if the UDMA lines are connected to the removable-media device. Bit (2) If bits 1 and 2 are both 0, the number of logical units will be determined by searching the ATA and CF buses for devices. CY7C68300B/CY7C68301B CY7C68320/CY7C68321 Required Suggested Contents Contents ...
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... Length of device descriptor in bytes. Type Descriptor type. USB Specification release number in BCD. USB Specification release number in BCD. Device class. Device subclass. Device protocol. USB packet size supported for default pipe. Number of configurations supported. CY7C68300B/CY7C68301B CY7C68320/CY7C68321 Required Suggested Contents Contents 0x00 0x12 0x01 ...
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... This is an Out endpoint, endpoint number 2. This is a bulk endpoint. Max data transfer size set by speed (Full speed 0x0040; High speed 0x0200) High-speed interval for polling (maximum NAK rate). Set to zero for full speed. CY7C68300B/CY7C68301B CY7C68320/CY7C68321 Required Suggested Contents Contents 0x00 ...
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... Interval for polling (max. NAK rate). Length of HID descriptor Descriptor Type HID HID Class Specification release number (1.10) Country Code Number of class descriptors (1 report descriptor) Descriptor Type Length of HID report descriptor Vendor defined - FFA0 CY7C68300B/CY7C68301B CY7C68320/CY7C68321 Required Suggested Contents Contents 0x07 0x05 0x88 ...
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... Value used to select an alternate setting for the interface identified in prior field Number of endpoints used by this interface (excluding endpoint 0) that are CSM dependent Must be set to zero Must be set to zero Index of a string descriptor that describes this Interface CY7C68300B/CY7C68301B CY7C68320/CY7C68321 Required Suggested Contents Contents 0x09 ...
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... Index of string descriptor that describes the Content Security Method CSM Descriptor Version number LANGID string descriptor length in bytes. Descriptor type. Language supported. The CY7C68300B supports one LANGID value. String descriptor length in bytes (including bLength). Descriptor type. Unicode character LSB. Unicode character MSB. ...
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... Unicode character LSB. Unicode character MSB. Unicode character LSB. Unicode character MSB. String descriptor length in bytes (including bLength). Descriptor type. Unicode character LSB. Unicode character MSB. Unicode character LSB. CY7C68300B/CY7C68301B CY7C68320/CY7C68321 Required Suggested Contents Contents “p” 0x70 0x00 “r” 0x72 0x00 “ ...
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... Unicode character MSB. Unicode character LSB. Unicode character MSB. Unicode character LSB. Unicode character MSB. Unicode character LSB. Unicode character MSB. Unicode character LSB. Unicode character MSB. CY7C68300B/CY7C68301B CY7C68320/CY7C68321 Required Suggested Contents Contents 0x00 “B” 0x42 0x00 “2” 0x32 0x00 “ ...
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... ASCII Character ASCII Character ASCII Character ASCII Character ASCII Character ASCII Character ASCII Character ASCII Character Amount of unused ROM space will vary depending on strings. CY7C68300B/CY7C68301B CY7C68320/CY7C68321 Required Suggested Contents Contents “A” 0x41 0x00 “B” 0x42 0x00 “C” 0x43 “ ...
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... Temperature Under Bias) ............. 0°C to +70°C A Supply Voltage ...........................................+3.15V to +3.45V 2 Ground Voltage ................................................................. 0V C memory device) F (Oscillator or Crystal Frequency) .... 24 MHz ± 100 ppm, osc .................................................................. Parallel Resonant CY7C68300B/CY7C68301B CY7C68320/CY7C68321 wIndex wLength Data Data Length Configuration Data Configuration Data Configuration bytes, addresses 0x0 – 0xF only ...
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... RESET Pin Reset After Power-Up 12.0 AC Electrical Characteristics 12.1 USB Transceiver Complies with the USB 2.0 specification. 13.0 Ordering Information Part Number CY7C68300B-56PVXC CY7C68301B-56PVXC CY7C68300B-56LFXC CY7C68301B-56LFXC CY7C68320-56LFXC CY7C68321-56LFXC CY7C68320-100AXC CY7C68321-100AXC CY4615B Note: 4. The General Purpose inputs can be enabled on ATAPUEN, PWR500#, and DRVPWRVLD via EEPROM byte 8, bit 7 on CY7C68320/CY7C68321. ...
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... Package Diagrams 100-Pin Thin Plastic Quad Flatpack ( 1.4 mm) A101 Figure 14-1. 100-lead Thin Plastic Quad Flatpack ( 1.4 mm) Document 38-08033 Rev. *D CY7C68300B/CY7C68301B CY7C68320/CY7C68321 51-85050-*A Page ...
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... Document 38-08033 Rev. *D SIDE VIEW 0.08[0.003] C 1.00[0.039] MAX. 0.05[0.002] MAX. 0.80[0.031] MAX. 0.20[0.008] REF. 0.30[0.012] 0.50[0.020] 0°-12° C SEATING PLANE Figure 14-3. 56-Lead QFN LF56A CY7C68300B/CY7C68301B CY7C68320/CY7C68321 51-85062-*C BOTTOM VIEW 0.18[0.007] 0.28[0.011] PIN1 ID N 0.20[0.008 0.45[0.018] E-PAD (PAD SIZE VARY BY DEVICE TYPE) ...
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... Solder Mask Cu Fill Cu Fill 0.013” dia This figure only shows the top three layers of the circuit board: Top Solder, PCB Dielectric, and the Ground Plane Figure 16-2. Plot of the Solder Mask (White Area) CY7C68300B/CY7C68301B CY7C68320/CY7C68321 PCB Material Page ...
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... Proper Power-up Sequence Power must be applied to the CY7C68300B/CY7C68301B before the same time as the ATA/ATAPI device. If power is supplied to the drive first, the CY7C68300B/CY7C68301B will start undefined state. Designs that utilize separate power supplies for the CY7C68300B/CY7C68301B and the ATA/ATAPI device are not recommended. ...
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... Document History Page Description Title: CY7C68300B/CY7C68301B/CY7C68320/CY7C68321 EZ-USB AT2LP™ USB 2.0 to ATA/ATAPI Bridge Document Number: 38-08033 REV. ECN NO. Issue Date ** 129739 12/04/03 *A 215125 SEE ECN *B 274109 SEE ECN *C 318133 SEE ECN *D 323408 SEE ECN Document 38-08033 Rev. *D Orig. of Change GIR New data sheet ...