MAX1956ETI-T Maxim Integrated Products, MAX1956ETI-T Datasheet - Page 11

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MAX1956ETI-T

Manufacturer Part Number
MAX1956ETI-T
Description
DC/DC Switching Controllers
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1956ETI-T

Number Of Outputs
2
Output Voltage
0.8 V to 4.95 V
Input Voltage
1.6 V to 5.5 V
Package / Case
TQFN EP-28
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Output voltage margining shifts the output voltage by
±4% from the nominal value to simplify system testing.
Outputs also can be powered up and down in select-
able sequences to meet core and logic supply rail
requirements.
The MAX1955/MAX1956 step-down DC-to-DC convert-
ers use a PWM voltage-mode control scheme. The con-
troller generates the clock signal by dividing down the
internal oscillator (or SYNC signal when using an external
clock) so that each controller’s switching frequency
equals 1/2 the oscillator frequency. An internal transcon-
ductance error amplifier produces an integrated error
voltage at the COMP_ pin, providing high DC accuracy.
The voltage at COMP sets the duty cycle, using a PWM
comparator and a ramp generator. At the rising edge of
the clock, Regulator 1’s high-side N-channel MOSFET
turns on and remains on until either the appropriate
duty cycle or the maximum duty cycle is reached.
Regulator 2 operates out of phase, so its high-side
MOSFET turns on at the falling edge of the clock.
During the on-time of each high-side MOSFET, the
associated inductor current ramps up.
During the second half of the switching cycle, the high-
side MOSFET turns off and the low-side N-channel
MOSFET (synchronous rectifier) turns on. The inductor
releases its stored energy as its current ramps down,
providing current to the load.
The gate-drive voltage for the high-side N-channel
switch is generated by a flying capacitor. This capacitor
between BST and LX is alternately charged from the V
supply and placed in parallel to the high-side MOSFET’s
gate and source terminal through the high-side driver.
On startup, the low-side MOSFET forces LX to ground
and charges the boost capacitors to V
Schottky diodes (D1 and D2 of Figure 5). On the second
half cycle, the controller turns on the high-side MOSFET
by closing an internal switch between BST and DH. This
provides the necessary gate-to-source voltage to turn
on the high-side MOSFET, an action that boosts the 5V
gate-drive signal above the input voltage.
The current-limit circuit employs a “valley” current-
sensing algorithm that uses the on-resistance of the
low-side MOSFET as a current-sensing element. If the
DC-to-DC PWM Controller
______________________________________________________________________________________
180° Out-of-Phase Step-Down Controllers
High-Side Gate-Drive
1.6V to 5.5V Input, 0.5% Accurate, Dual
Current Limit
Supply (BST)
DD
through the
DD
current-sense signal (measured from PGND_ to LX_) is
above the current-limit threshold, the MAX1955/
MAX1956 do not initiate a new cycle, and COMP_ is
pulled to ground. Since valley current sensing is used,
the actual peak current is greater than the current-limit
threshold by an amount equal to the inductor ripple
current (Figure 2). The exact current-limit characteristic
and maximum load capacity are a function of the low-
side MOSFET’s on-resistance, the current-limit thresh-
old, the inductor value, and the input voltage. This
provides a robust lossless current sense that does not
require current-sense resistors.
An added feature is the implementation of Schottky
diodes D3 and D4 (as shown in Figure 5), which
reduce output short-circuit currents.
The adjustable current limit accommodates MOSFETs
with a wide range of on-resistance values. The current-
limit threshold is adjusted with an external resistor con-
nected from ILIM_ to GND (R
range is 75mV to 300mV, measured across the low-side
MOSFET. The value of R
lowing formula:
where I
the on-resistance of the low-side MOSFET. To avoid
reaching the current limit at a lower current than
expected, use the maximum value for R
elevated junction temperature. Refer to the MOSFET
manufacturer’s data sheet for maximum values.
Figure 2. Inductor Current Waveform
VALLEY
R
ILIM
is the valley current limit and R
_
=
0 15
ILIM_
.
I
VALLEY
Constant-Current Limit
×
is calculated using the fol-
TIME
ILIM
A
_). The adjustment
×
R
DS ON
(
DS(ON)
)
I
I
I
PEAK
LOAD
VALLEY
DS(ON)
at an
11
is

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