MAX1956ETI Maxim Integrated Products, MAX1956ETI Datasheet - Page 18

• Manufacturer Part Number: MAX1956ETI
• Description: DC/DC Switching Controllers
• Manufacturer: Maxim Integrated Products

Specifications of MAX1956ETI

• Number Of Outputs: 2
• Output Voltage: 0.8 V to 4.95 V
• Input Voltage: 1.6 V to 5.5 V
• Package / Case: TQFN EP-28
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Use R
where I
determined by:
where R
tance (1Ω typical) and R
tance of the MOSFET (~2Ω):
where V
In addition to the losses above, allow about 20% more for
additional losses because of MOSFET output capaci-
tances and low-side MOSFET body-diode reverse recov-
ery charge dissipated in the high-side MOSFET that is not
well defined in the MOSFET data sheet. Refer to the
MOSFET data sheet for thermal-resistance specifications
to calculate the PC board area needed to maintain the
desired maximum operating junction temperature with the
above-calculated power dissipations.
To reduce EMI caused by switching noise, add a 0.1µF
ceramic capacitor from the high-side switch drain to the
low-side switch source, or add resistors in series with
DH and DL to slow down the switching transitions.
Adding series resistors increases the power dissipation
of the MOSFET, so ensure that this does not overheat
the MOSFET.
Fast switching transitions cause ringing because of res-
onating circuit parasitic inductance and capacitance at
the switching nodes. This high-frequency ringing
occurs at LX’s rising and falling transitions and can
interfere with circuit performance and generate EMI. To
dampen this ringing, a series R-C snubber circuit is
added across each switch. Below is the procedure for
selecting the value of the series R-C circuit:
1) Connect a scope probe to measure V
2) Find the capacitor value (connected from LX to
1.6V to 5.5V Input, 0.5% Accurate, Dual
180° Out-of-Phase Step-Down Controllers
18
and observe the ringing frequency, f
GND) that reduces the ringing frequency by half.
The circuit parasitic capacitance (C
then equal to 1/3 the value of the added capaci-
tance above. The circuit parasitic inductance
(L
P
P
______________________________________________________________________________________
HSSW
HSDR
PAR
DS(ON)
GATE
GS
DH
) is calculated by:
= V
=
=
I
is the high-side MOSFET driver’s on-resis-
GATE ON
at T
is the average DH driver output-current
Q
V
VDD
IN
G
J(MAX)
( )
×
×
= 5V
I
V
LOAD
GS
.
=
MOSFET Snubber Circuit
.
GATE
×
R
×
DH
f
SW
f
SW
is the internal gate resis-
+
×
. 2 5
×
R
R
GATE
GATE
Q
GS
R
R
I
GATE
GATE
.
PAR
+
+
LX
Q
) at LX is
R
Gd
to GND,
DH
The resistor for critical dampening (R
x f
the desired damping and the peak voltage excursion.
The capacitor (C
the value of the C
power loss of the snubber circuit is dissipated in the
resistor (P
where V
frequency. Choose an R
the specific application’s derating rule for the power
dissipation calculated.
A low-current Schottky diode, such as CMSSH-3 from
Central Semiconductor, works well for most applications.
Do not use large-power diodes, because higher junction
capacitance can charge up the BST to LX voltage and
can exceed the device rating of 6V. The boost capacitor
should be 0.1µF to 4.7µF, depending on the input and
output voltages, external components, and PC board lay-
out. The boost capacitance should be as large as possi-
ble to prevent it from charging to excessive voltage, but
small enough to adequately charge during the minimum
low-side MOSFET conduction time, which happens at
maximum operating duty cycle (this occurs at minimum
input voltage). In addition, ensure that the boost capacitor
does not discharge to below the minimum gate-to-source
voltage required to keep the high-side MOSFET fully
enhanced for lowest on-resistance. This minimum gate-
to-source voltage V
where V
high-side MOSFET, and C
value.
The MAX1955/MAX1956 use a voltage-mode control
scheme that regulates the output voltage by comparing
the error amplifier output (COMP) with a fixed internal
ramp to produce the required duty cycle. The inductor
and output capacitor create a double pole at the reso-
nant frequency, which has a gain drop of 40dB per
decade and phase shift of 180°. The error amplifier
R
x L
PAR
IN
VDD
RSNUB
P
V
. Adjust the resistor value up or down to tailor
is the input voltage and f
RSNUB
Boost-Supply Diode and Capacitor
GS MIN
L
is 5V, Q
PAR
(
) and can be calculated as:
SNUB
GS(MIN)
=
)
=
PAR
=
C
G
) should be at least 2 to 4 times
SNUB
(
V
2
VDD
is the total gate charge of the
π
in order to be effective. The
SNUB
f
BOOST
R
is determined by:
Compensation Design
)
×
2
-
1
( )
power rating that meets
×
C
V
IN
BOOST
is the boost capacitor
C
Q
2
PAR
G
SNUB
SW
×
is the switching
f
) is equal to 2π
SW