MAX1880EUG Maxim Integrated Products, MAX1880EUG Datasheet - Page 31

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MAX1880EUG

Manufacturer Part Number
MAX1880EUG
Description
DC/DC Switching Converters
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1880EUG

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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A linear regulator’s minimum input-to-output voltage dif-
ferential (dropout voltage) determines the lowest use-
able supply voltage. Because the MAX1778/
MAX1881/MAX1883/MAX1884 use an internal PNP
transistor (or external NPN transistor), their dropout
voltage is a function of the transistor’s collector-to-emit-
ter saturation voltage (see Typical Operating
Characteristics). The linear regulator’s quiescent cur-
rent increases when in dropout.
The internal linear regulator will try to start up once its
supply voltage (V
regulator powers up, the linear regulator may be in
dropout if the linear regulator’s output set voltage is
higher than its input supply voltage. Therefore, during
this brief period, the linear regulator draws additional
supply current until the input supply voltage exceeds
the output set voltage plus the pass transistor’s satura-
tion voltage (V
The positive input (BUF+) features dual mode opera-
tion. Connect BUF+ to GND for the preset VSUPB/2
output voltage, set by an internal 50% resistive-divider.
Adjust the amplifier’s output voltage by connecting a
Figure 7. External Linear Regulator
Buffer Output Voltage and Capacitor Selection
Input-Output (Dropout) Voltage and Startup
LDO(SET
V
Transconductance Amplifier)
IN
SUPL
______________________________________________________________________________________
INPUT
= 3.3V
VCOM Buffer (Operational
) + V
) exceeds 4V. When the linear
4.7μF
C
IN
CE(SAT)
0.22μF
0.22μF
C
C1
REF
).
INTG
REF
IN
SHDN
PGND
(MAX1881)*
(MAX1884)*
MAX1778
MAX1883
Quad-Output TFT LCD DC-DC
6.8μH
L1
LDOOUT
SUPL
GND
FBL
LX
FB
voltage-divider from SUPB to BUF+ to GND (Figure 6).
Select R12 in the 10kΩ to 100kΩ range. Calculate R11
with the following equation:
where V
may range from 1.2V to (V
mum 1µF ceramic capacitor from BUFOUT to ground.
Careful PC board layout is extremely important for
proper operation. Follow the following guidelines for
good PC board layout:
1) Place the main step-up converter output diode and
2) Separate analog ground and power ground. The
Converters with Buffer
49.9kΩ
R5
1.5kΩ
274kΩ
output capacitor less than 0.2in (5mm) from the LX
and PGND pins with wide traces and no vias.
ground connections for the step-up converter’s and
charge pump’s input and output capacitors should
be connected to the power ground plane. The lin-
ear regulator’s and VCOM buffer’s input and output
capacitors should be connected to a separate
power-ground path, star-connected to the PGND
pin to minimize voltage drops. When using multi-
layer boards, the top layer should contain the boost
R1
R2
SUPB
C
4.7μF
0.01μF
0.01μF
LDOOUT
C2
C3
R
may range from 4.5V to 13V, and V
PC Board Layout and Grounding
11
=
R
C
(2) 4.7μF
12
Q1
OUT
R3
49.9kΩ
R4
49.9kΩ
C
1μF
SUPB
LDOIN
V
V
SUPB
BUF
MAIN
V
MAIN
- 1.2V). Connect a mini-
+
= 8V
C
1μF
LDO
-
1
LDO
V
LDO
= 2.5V
BUF+
31

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