DS4560LS-AR+ Maxim Integrated Products, DS4560LS-AR+ Datasheet - Page 6

• Manufacturer Part Number: DS4560LS-AR+
• Description: Hot Swap & Power Distribution
• Manufacturer: Maxim Integrated Products

Specifications of DS4560LS-AR+

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

12V Hot-Plug Switch
The voltage level of the TIMER pin is compared to an
internal source (see the Block Diagram) . When the level
on the pin exceeds V
level. This then turns on the voltage ramp circuit,
enabling the device’s output. This TIMER pin can be
configured into one of four different modes of operation
listed in Table 1. The TIMER pin was designed to work
with most logic families. The TIMER pin will have at
least 250mV of hysteresis between V
recommended that any logic gate used to drive the
TIMER pin be tested to ensure proper operation.
Once the device has been enabled, there is a delay
(t
This delay is the time required for the charge pump to
bring the gate voltage of the power MOSFET above its
threshold level. Once the gate is above the threshold
level, conduction begins and the output voltage begins
ramping.
When V
TIMER node low is released. The internal current
source brings the node to a level greater than V
enabling the device.
When V
TIMER node low is released. The internal current
source (I
C
device turns on. The equation for the delay time is:
A logic gate or open-collector device can be connect-
ed to the TIMER pin to enable or disable the device.
When the TIMER pin is held low, the device is disabled.
When an open-collector device is used to drive the
TIMER pin, the DS4560 is enabled when the open col-
lector is in its high-impedance state by the internal cur-
rent source bringing the TIMER node high. The TIMER
pin is also compatible with most logic families if the out-
Table 1. TIMER Pin Modes
6
POND
TIMER
_______________________________________________________________________________________
) until conduction begins from V
CC
CC
is charged to a level greater than V
TIMER
t
exceeds V
exceeds V
DELAY
) then begins charging C
Delayed Automatic Enable
Enable with Delay/Disable
MODE OF OPERATION
= (C
Delayed Automatic Enable Mode
Automatic Enable
ON
Enable/Disable
TIMER
UVLOR
UVLOR
, the comparator outputs a low
x V
Automatic Enable Mode
, the gate holding the
, the gate holding the
ON
Enable/Disable Mode
)/I
ON
TIMER
Enable/Timer
and V
CC
TIMER
to LOAD.
OFF
ON
. When
. It is
, the
ON
,
No connection to TIMER pin.
Capacitor C
Open-collector device.
Open-collector device and C
put high voltage level of the gate exceeds the V
level, and the gate can sink the I
An open-collector device is connected in parallel with
C
abled. When the open-collector driver is high imped-
ance, the internal current source begins to charge
C
The voltage ramp circuit uses an operational amplifier
to control the gate bias of the n-channel power
MOSFET. When the timer/enable circuit is disabled, a
FET is used to keep C
the output voltage to GND. Once the enable/timer cir-
cuit has been enabled, an internal current source,
I
C
controls the gate of the power MOSFET so that the
LOAD output voltage divided by two tracks the rising
voltage level of C
to ramp until it reaches either the input V
overvoltage clamp limits. The equation for the output-
voltage ramp function is:
The DS4560 enters a thermal shutdown state when the
temperature of the power MOSFET reaches or exceeds
T
ed, the thermal-limiting circuitry disables the DS4560
using the enable circuitry. The DS4560 is offered in two
different versions: an autoretry version and a latchoff
version.
The autoretry verson continually monitors the tempera-
ture once it has entered thermal shutdown. If the junc-
tion temperature falls below approximately +95°C
(T
the Thermal Shutdown with Autoretry graph for details.
VRAMP
SHDN
TIMER
TIMER
VRAMP
SHDN
, approximately +135°C. When T
. When the pin is held low, the DS4560 is dis-
as in the delayed mode.
, begins to charge the external capacitor,
- T
, connected to the VRAMP pin. The amplifier
TIMER
dV
HYS
LOAD
connected to TIMER.
), the power MOSFET is re-enabled. See
VRAMP
TIMER PIN SETUP
/dt = 2 x (I
Autoretry Version (DS4560S-AR)
Enable with Delay/Disable Mode
VRAMP
TIMER
. The output voltage continues
Output-Voltage Ramp
VRAMP
.
discharged, which forces
Thermal Shutdown
TIMER
/C
VRAMP
current.
SHDN
CC
)
level or the
is exceed-
ON