CYP15G0101DXB-BBXC Cypress Semiconductor Corp, CYP15G0101DXB-BBXC Datasheet - Page 29

IC TXRX HOTLINK 100-LBGA

CYP15G0101DXB-BBXC

Manufacturer Part Number
CYP15G0101DXB-BBXC
Description
IC TXRX HOTLINK 100-LBGA
Manufacturer
Cypress Semiconductor Corp
Series
HOTlink II™r
Type
Transceiverr

Specifications of CYP15G0101DXB-BBXC

Package / Case
100-LBGA
Protocol
Fibre Channel
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Product
PHY
Data Rate
1500 MBd
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current
0.5 A
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Channels
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CYP15G0101DX-EVAL - EVAL BRD FOR HOTLINK II
Number Of Drivers/receivers
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-2920
CYP15G0101DXB-BBXC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CYP15G0101DXB-BBXC
Manufacturer:
MURATA
Quantity:
260 000
Part Number:
CYP15G0101DXB-BBXC
Manufacturer:
CYPRESS
Quantity:
206
Part Number:
CYP15G0101DXB-BBXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CYP15G0101DXB-BBXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Company:
Part Number:
CYP15G0101DXB-BBXC
Quantity:
5 050
Switching Waveforms for the HOTLink II Transmitter
Notes
Document Number: 38-02031 Rev. *L
53. When REFCLK is configured for half-rate operation (TXRATE
54. The TXCLKO output is at twice the rate of REFCLK when TXRATE = HIGH and same rate as REFCLK when TXRATE = LOW. TXCLKO does not follow the duty
55. The rising edge of TXCLKO output has no direct phase relationship to the REFCLK input.
Transmit Interface
Write Timing
TXCKSEL = LOW
TXRATE = LOW
Transmit Interface
Write Timing
TXCKSEL = LOW
TXRATE = HIGH
Transmit Interface
TXCLKO Timing
TXCKSEL = LOW
TXRATE = HIGH
TXCT[1:0],
TXCT[1:0],
Transmit Interface
Write Timing
TXCKSEL  LOW
is captured using both the rising and falling edges of REFCLK.
cycle of REFCLK.
TXD[7:0],
TXD[7:0],
REFCLK
TXCT[1:0],
SCSEL
TXCLK
SCSEL
TXD[7:0],
TXOP,
TXOP,
REFCLK
SCSEL
TXOP,
REFCLK
TXCLKO
Note
55
Note
53
t
t
t
REFH
TXCLKH
TREFDH
t
TXCLKOD+
t
t
REFCLK
TXCLK
t
t
REFH
TXCLKO
=
t
REFH
HIGH) and data is captured using REFCLK instead of TXCLK clock (TXCKSEL
t
TREFDS
t
t
TXCLKL
REFL
t
Note
t
TXCLKOD–
TXDS
t
TREFDS
54
t
REFCLK
Note 53
t
REFCLK
t
t
TREFDH
TXDH
t
TREFDH
t
REFL
t
REFL
t
TREFDS
CYW15G0101DXB
CYP15G0101DXB
CYV15G0101DXB
=
Page 29 of 44
LOW), data
[+] Feedback

Related parts for CYP15G0101DXB-BBXC