PIC16C54C-04/P Microchip Technology Inc., PIC16C54C-04/P Datasheet - Page 31

• Manufacturer Part Number: PIC16C54C-04/P
• Description: 18 PIN, 0.75 KB OTP, 25 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16C54C-04/P

• Cpu Speed: 10 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 12
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 0.75K Bytes
• Ram Size: 25 Bytes
• Speed: 4 MHz
• Timers: 1- 8-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

6.3
This register contains the arithmetic status of the ALU,
the RESET status and the page preselect bits for pro-
gram memories larger than 512 words.
The STATUS Register can be the destination for any
instruction, as with any other register. If the STATUS
Register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
REGISTER 6-1:
bit 7:
bit 6-5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
Legend:
R = Readable bit
-n = Value at POR
2002 Microchip Technology Inc.
STATUS Register
PA2: This bit unused at this time.
Use of the PA2 bit as a general purpose read/write bit is not recommended, since this may affect upward
compatibility with future products.
PA<1:0>: Program page preselect bits (PIC16C56/CR56)(PIC16C57/CR57)(PIC16C58/CR58)
00 = Page 0 (000h - 1FFh) - PIC16C56/CR56, PIC16C57/CR57, PIC16C58/CR58
01 = Page 1 (200h - 3FFh) - PIC16C56/CR56, PIC16C57/CR57, PIC16C58/CR58
10 = Page 2 (400h - 5FFh) - PIC16C57/CR57, PIC16C58/CR58
11 = Page 3 (600h - 7FFh) - PIC16C57/CR57, PIC16C58/CR58
Each page is 512 words.
Using the PA<1:0> bits as general purpose read/write bits in devices which do not use them for program
page preselect is not recommended since this may affect upward compatibility with future products.
TO: Time-out bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit carry/borrow bit (for ADDWF and SUBWF instructions)
ADDWF
1 = A carry from the 4th low order bit of the result occurred
0 = A carry from the 4th low order bit of the result did not occur
SUBWF
1 = A borrow from the 4th low order bit of the result did not occur
0 = A borrow from the 4th low order bit of the result occurred
C: Carry/borrow bit (for ADDWF, SUBWF and RRF, RLF instructions)
ADDWF
1 = A carry occurred
0 = A carry did not occur
bit 7
R/W-0
PA2
STATUS REGISTER (ADDRESS: 03h)
R/W-0
PA1
W = Writable bit
1 = bit is set
R/W-0
PA0
1 = A borrow did not occur
0 = A borrow occurred
SUBWF
Preliminary
R-1
TO
U = Unimplemented bit, read as ‘0’
0 = bit is cleared
writable. Therefore, the result of an instruction with the
STATUS Register as destination may be different than
intended.
For example, CLRF STATUS will clear the upper three
bits and set the Z bit. This leaves the STATUS Register
as 000u u1uu (where u = unchanged).
It is recommended, therefore, that only BCF, BSF and
MOVWF instructions be used to alter the STATUS Reg-
ister because these instructions do not affect the Z, DC
or C bits from the STATUS Register. For other instruc-
tions which do affect STATUS Bits, see Section 10.0,
Instruction Set Summary.
R-1
PD
Loaded with LSb or MSb, respectively
RRF or RLF
R/W-x
Z
x = bit is unknown
PIC16C5X
R/W-x
DC
DS30453D-page 29
R/W-x
bit 0
C