PIC16F1826-I/SO Microchip Technology Inc., PIC16F1826-I/SO Datasheet - Page 66

• Manufacturer Part Number: PIC16F1826-I/SO
• Description: 18 SOIC .300in TUBE, 3.5 KB Flash, 256 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhan
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1826-I/SO

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 15
• Interface: I2C/SPI/UART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin SOIC
• Programmable Memory: 3.5K Bytes
• Ram Size: 256 Bytes
• Speed: 32 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC16(L)F1826/27
REGISTER 5-2:
DS41391D-page 66
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
T1OSCR
R-1/q
T1OSCR: Timer1 Oscillator Ready bit
If T1OSCEN = 1:
1 = Timer1 oscillator is ready
0 = Timer1 oscillator is not ready
If T1OSCEN = 0:
1 = Timer1 clock source is always ready
PLLR 4x PLL Ready bit
1 = 4x PLL is ready
0 = 4x PLL is not ready
OSTS: Oscillator Start-up Time-out Status bit
1 = Running from the clock defined by the FOSC<2:0> bits of the Configuration Word 1
0 = Running from an internal oscillator (FOSC<2:0> = 100)
HFIOFR: High Frequency Internal Oscillator Ready bit
1 = HFINTOSC is ready
0 = HFINTOSC is not ready
HFIOFL: High Frequency Internal Oscillator Locked bit
1 = HFINTOSC is at least 2% accurate
0 = HFINTOSC is not 2% accurate
MFIOFR: Medium Frequency Internal Oscillator Ready bit
1 = MFINTOSC is ready
0 = MFINTOSC is not ready
LFIOFR: Low Frequency Internal Oscillator Ready bit
1 = LFINTOSC is ready
0 = LFINTOSC is not ready
HFIOFS: High Frequency Internal Oscillator Stable bit
1 = HFINTOSC is at least 0.5% accurate
0 = HFINTOSC is not 0.5% accurate
R-0/q
PLLR
OSCSTAT: OSCILLATOR STATUS REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
OSTS
R-q/q
HFIOFR
R-0/q
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
q = Conditional
HFIOFL
R-0/q
MFIOFR
R-q/q
 2011 Microchip Technology Inc.
LFIOFR
R-0/0
HFIOFS
R-0/q
bit 0