ATA6662C-TAQY Atmel, ATA6662C-TAQY Datasheet - Page 3

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ATA6662C-TAQY

Manufacturer Part Number
ATA6662C-TAQY
Description
TXRX LIN 2.1 3.3V/5V SO8
Manufacturer
Atmel
Type
Transceiverr
Datasheet

Specifications of ATA6662C-TAQY

Number Of Drivers/receivers
1/1
Protocol
LIN
Voltage - Supply
5 V ~ 27 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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3. Functional Description
3.1
3.2
3.3
3.4
3.5
3.6
3.7
4916O–AUTO–05/10
Physical Layer Compatibility
Supply Pin (V
Ground Pin (GND)
Bus Pin (LIN)
Input/Output Pin (TXD)
TXD Dominant Time-out Function
Output Pin (RXD)
S
Since the LIN physical layer is independent from higher LIN layers (e.g., the LIN protocol layer),
all nodes with a LIN physical layer according to revision 2.x can be mixed with LIN physical layer
nodes, which, according to older versions (i.e., LIN 1.0, LIN 1.1, LIN 1.2, LIN 1.3), are without
any restrictions.
Undervoltage detection is implemented to disable transmission if V
order to avoid false bus messages. After switching on V
INHIBIT is switched on. The supply current in Sleep Mode is typically 10 µA.
The ATA6662 does not affect the LIN Bus in the case of a GND disconnection. It is able to han-
dle a ground shift up to 11.5% of V
A low-side driver with internal current limitation and thermal shutdown and an internal pull-up
resistor are implemented as specified for LIN 2.x. The voltage range is from –27V to +40V. This
pin exhibits no reverse current from the LIN bus to V
disconnection. The LIN receiver thresholds are compatible to the LIN protocol specification.The
fall time (from recessive to dominant) and the rise time (from dominant to recessive) are slope
controlled. The output has a self-adapting short circuit limitation; that is, during current limitation,
as the chip temperature increases, the current is reduced.
In Normal Mode the TXD pin is the microcontroller interface to control the state of the Lin output.
TXD must be at Low- level in order to have a low LIN Bus. If TXD is high, the LIN output
transistor is turned off and the Bus is in recessive state. The TXD pin is compatible to both a
3.3V or 5V supply. During fail-safe Mode, this pin is used as output and is signalling the wake-up
source (see
< 8 mA.
The TXD input has an internal pull-down resistor. An internal timer prevents the bus line from
being driven permanently in dominant state. If TXD is forced to low longer than t
pin LIN will be switched off (Recessive Mode). To reset this mode, switch TXD to high (> 10 µs)
before switching LIN to dominant again.
This pin reports to the microcontroller the state of the LIN bus. LIN high (recessive) is reported
by a high level at RXD, LIN low (dominant) is reported by a low voltage at RXD. The output is an
open drain, therefore, it is compatible to a 3.3V or 5V power supply. The AC characteristics are
defined with a pull-up resistor of 5 k to 5V and a load capacitor of 20 pF. The output is short-
protected. In Unpowered Mode (V
diode is integrated, with V
)
Section 3.14 “Wake-up Source Recognition” on page
Z
= 6.1V.
S
.
S
= 0V), RXD is switched off. For ESD protection a Zener
S
, even in the case of a GND shift or V
S
, the IC switches to Fail-safe Mode and
S
falls to a value below 5V in
7). It is current limited to
ATA6662
DOM
> 6 ms, the
Batt
3

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