74HC4046AN,652 Philips Semiconductors, 74HC4046AN,652 Datasheet

74HC4046AN,652

Manufacturer Part Number

74HC4046AN,652

Description

LOGIC, PHASE LOCKED LOOP W/VCO, PKG STYLE 16 LEAD PDIP

Manufacturer

Philips Semiconductors

Datasheet

1.74HC4046AN652.pdf (9 pages)

Specifications of 74HC4046AN,652

Circuit Type

High Speed, Silicon Gate

Current, Input, Diode

20 mA

Current, Leakage, Input

1 μA

Current, Output, Dc

25 mA

Current, Output, Diode

20 mA

Current, Quiescent Supply

20.0 μA (SSI)

Current, Supply

160 μA

Function Type

3-Phase Comparator

Input Fall Time

6 ns

Input Rise Time

6 ns

Logic Function

Phase-Locked-Loop

Logic Type

CMOS

Package Type

DIP-16

Power Dissipation

750 mW

Special Features

Edge-Triggered

Temperature, Operating, Maximum

85 °C

Temperature, Operating, Minimum

-40 °C

Temperature, Operating, Range

-40 to +125 °C

Voltage, Dc Input

6.0 V (Max.)

Voltage, Dc Output

6.0 V (Max.)

Voltage, Supply

5 V

Lead Free Status / Rohs Status

RoHS Compliant part Electrostatic Device

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Philips Semiconductors

FEATURES

GENERAL DESCRIPTION

The 74HC/HCT4046A are high-speed Si-gate CMOS

devices and are pin compatible with the “4046” of the

“4000B” series. They are specified in compliance with

JEDEC standard no. 7A.

The 74HC/HCT4046A are phase-locked-loop circuits that

comprise a linear voltage-controlled oscillator (VCO) and

three different phase comparators (PC1, PC2 and PC3)

with a common signal input amplifier and a common

comparator input.

The signal input can be directly coupled to large voltage

signals, or indirectly coupled (with a series capacitor) to

small voltage signals. A self-bias input circuit keeps small

voltage signals within the linear region of the input

amplifiers. With a passive low-pass filter, the “4046A”

forms a second-order loop PLL. The excellent VCO

linearity is achieved by the use of linear op-amp

techniques.

The VCO requires one external capacitor C1 (between

(between R

and capacitor C1 determine the frequency range of the

VCO. Resistor R2 enables the VCO to have a frequency

offset if required.

The high input impedance of the VCO simplifies the design

of low-pass filters by giving the designer a wide choice of

resistor/capacitor ranges. In order not to load the low-pass

filter, a demodulator output of the VCO input voltage is

Low power consumption

Centre frequency of up to 17 MHz (typ.) at V

Choice of three phase comparators: EXCLUSIVE-OR;

edge-triggered JK flip-flop;

edge-triggered RS flip-flop

Excellent VCO frequency linearity

VCO-inhibit control for ON/OFF keying and for low

standby power consumption

Minimal frequency drift

Operating power supply voltage range:

VCO section 3.0 to 6.0 V

digital section 2.0 to 6.0 V

Zero voltage offset due to op-amp buffering

Output capability: standard

Phase-locked-loop with VCO

and GND) or two external resistors R1 and R2

and C1

category: MSI.

) and one external resistor R1 (between

and GND, and R

and GND). Resistor R1

= 4.5 V

provided at pin 10 (DEM

techniques where the DEM

voltage lower than the VCO input voltage, here the

DEM

from DEM

open. The VCO output (VCO

directly to the comparator input (COMP

via a frequency-divider. The VCO output signal has a duty

factor of 50% (maximum expected deviation 1%), if the

VCO input is held at a constant DC level. A LOW level at

the inhibit input (INH) enables the VCO and demodulator,

while a HIGH level turns both off to minimize standby

power consumption.

The only difference between the HC and HCT versions is

the input level specification of the INH input. This input

disables the VCO section. The sections of the comparator

are identical, so that there is no difference in the

SIG

and HCT versions.

Phase comparators

The signal input (SIG

self-biasing amplifier at pin 14, provided that the signal

swing is between the standard HC family input logic levels.

Capacitive coupling is required for signals with smaller

swings.

Phase comparator 1 (PC1)

This is an EXCLUSIVE-OR network. The signal and

comparator input frequencies (f

factor to obtain the maximum locking range. The transfer

characteristic of PC1, assuming ripple (f

suppressed, is:

where V

The phase comparator gain is:

The average output voltage from PC1, fed to the VCO

input via the low-pass filter and seen at the demodulator

output at pin 10 (V

differences of signals (SIG

(COMP

equal to

SIG

frequency (f

at f

DEMOUT

are shown in Fig.7.

OUT

(pin 14) or COMP

and with this input the VCO oscillates at the centre

DEMOUT

voltage equals that of the VCO input. If

is used, a load resistor (R

) as shown in Fig.6. The average of V

= V

OUT

). Typical waveforms for the PC1 loop locked

PC1OUT

to GND; if unused, DEM

when there is no signal or noise at

is the demodulator output at pin 10;

DEMOUT

(via low-pass filter).

) can be directly coupled to the

OUT

), is the resultant of the phase

(pin 3) inputs between the HC

OUT

). In contrast to conventional

) and the comparator input

74HC/HCT4046A

OUT

---------- -

voltage is one threshold

) must have a 50% duty

) can be connected

Product speciﬁcation

) should be connected

SIGIN

---------- - V r ˙ .

OUT

), or connected

= 2f

–

should be left

COMPIN

) is

DEMOUT

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74HC4046AN,652 Summary of contents

Page 1

... Philips Semiconductors Phase-locked-loop with VCO FEATURES Low power consumption Centre frequency MHz (typ Choice of three phase comparators: EXCLUSIVE-OR; edge-triggered JK flip-flop; edge-triggered RS flip-flop Excellent VCO frequency linearity VCO-inhibit control for ON/OFF keying and for low standby power consumption Minimal frequency drift Operating power supply voltage range: VCO section 3 ...

Page 2

... Philips Semiconductors Phase-locked-loop with VCO The frequency capture range (2f frequency range of input signals on which the PLL will lock if it was initially out-of-lock. The frequency lock range ( defined as the frequency range of input signals on L which the loop will stay locked if it was initially in lock. The capture range is smaller or equal to the lock range ...

Page 3

... Philips Semiconductors Phase-locked-loop with VCO QUICK REFERENCE DATA GND = amb SYMBOL f VCO centre frequency o C input capacitance (pin power dissipation capacitance per PD package Notes used to determine the dynamic power dissipation ( input frequency in MHz output frequency in MHz output load capacitance in pF supply voltage in V. ...

Page 4

... Philips Semiconductors Phase-locked-loop with VCO RECOMMENDED OPERATING CONDITIONS FOR 74HC/HCT SYMBOL PARAMETER V DC supply voltage supply voltage if VCO CC section is not used V DC input voltage range output voltage range O T operating ambient amb temperature range T operating ambient amb temperature range input rise and fall times (pin 5) ...

Page 5

... Philips Semiconductors Phase-locked-loop with VCO DC CHARACTERISTICS FOR 74HC Quiescent supply current Voltages are referenced to GND (ground = 0 V) SYMBOL PARAMETER min. typ. max. min. max. min. quiescent supply I current (VCO CC disabled) Phase comparator section Voltages are referenced to GND (ground = 0 V) SYM- PARAMETER ...

Page 6

... Philips Semiconductors Phase-locked-loop with VCO SYM- PARAMETER BOL R input resistance I SIG , COMP IN IN VCO section Voltages are referenced to GND (ground = 0 V) SYM- PARAMETER BOL V HIGH level IH input voltage INH V LOW level IL input voltage INH V HIGH level OH output voltage VCO OUT V HIGH level ...

Page 7

... Philips Semiconductors Phase-locked-loop with VCO SYM- PARAMETER BOL R resistor range 2 C1 capacitor range V operating voltage VCOIN range at VCO IN Note 1. The parallel value of R1 and R2 should be more than 2 Optimum performance is achieved when R1 and are/ Demodulator section Voltages are referenced to GND (ground = 0 V) ...

Page 8

... Philips Semiconductors Phase-locked-loop with VCO AC CHARACTERISTICS FOR 74HC Phase comparator section GND = ns SYMBOL PARAMETER t / propagation delay PHL t SIG , COMP PLH PC1 OUT t / propagation delay PHL t SIG , COMP PLH PCP OUT t / propagation delay PHL t SIG , COMP PLH PC3 OUT t / 3-state output enable ...

Page 9

... Philips Semiconductors Phase-locked-loop with VCO VCO section GND = ns SYMBOL PARAMETER f/T frequency stability with temperature change f VCO centre o frequency (duty factor = 50%) f VCO frequency VCO linearity duty factor at VCO VCO OUT DC CHARACTERISTICS FOR 74HCT Quiescent supply current Voltages are referenced to GND (ground = 0 V) ...

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