PIC16C711-04/P Microchip Technology Inc., PIC16C711-04/P Datasheet - Page 96

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PIC16C711-04/P

Manufacturer Part Number
PIC16C711-04/P
Description
18 PIN, 1.75 KB OTP, 68 RAM, 13 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16C711-04/P

A/d Inputs
4-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
13
Memory Type
OTP
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
68 Bytes
Speed
20 MHz
Timers
1-8-bit
Voltage, Range
2.5-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC16C71X
FIGURE 11-3: CLKOUT AND I/O TIMING
TABLE 11-3:
DS30272A-page 96
Applicable Devices
Note 1: Measurements are taken in RC Mode where CLKOUT output is 4 x T
Parameter
CLKOUT
I/O Pin
(output)
22††*
23††*
I/O Pin
(input)
No.
10*
11*
12*
13*
14*
15*
16*
17*
18*
19*
20*
21*
OSC1
*
†† These parameters are asynchronous events not related to any internal clock edges.
These parameters are characterized but not tested.
Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Sym
TosH2ckL
TosH2ckH OSC1 to CLKOUT
TckR
TckF
TckL2ioV
TioV2ckH
TckH2ioI
TosH2ioV
TosH2ioI
TioV2osH
TioR
TioF
Tinp
Trbp
Note: Refer to Figure 11-1 for load conditions.
CLKOUT AND I/O TIMING REQUIREMENTS
old value
Characteristic
OSC1 to CLKOUT
CLKOUT rise time
CLKOUT fall time
CLKOUT
Port in valid before CLKOUT
Port in hold after CLKOUT
OSC1 (Q1 cycle) to
Port out valid
OSC1 (Q2 cycle) to
Port input invalid (I/O in hold time)
Port input valid to OSC1 (I/O in setup time)
Port output rise time
Port output fall time
INT pin high or low time
RB7:RB4 change INT high or low time
Q4
710 71 711 715
to Port out valid
10
13
17
14
20, 21
PIC16C710/711
PIC16LC710/711
PIC16C710/711
PIC16LC710/711
Q1
19
18
0.25T
TBD
TBD
Min
OSC
20
20
CY
0
Q2
.
+ 25
15
Typ†
15
15
10
10
5
5
0.5T
80 - 100
1997 Microchip Technology Inc.
11
Max
12
CY
30
30
15
15
25
60
25
60
+ 20
new value
16
Q3
Units Conditions
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1

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