74HC02PW,112 Philips Semiconductors, 74HC02PW,112 Datasheet
74HC02PW,112
Specifications of 74HC02PW,112
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74HC02PW,112 Summary of contents
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Quad 2-input NOR gate 1. General description The 74HC02; 74HCT02 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC02; 74HCT02 provides a quad 2-input ...
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NXP Semiconductors 6. Functional description [1] Table 3. Function table Input [ HIGH voltage level LOW voltage level don’t care. 7. Limiting values Table 4. Limiting values In accordance with ...
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NXP Semiconductors Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter t/ V input transition rise and fall rate 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced ...
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NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74HCT02 V HIGH-level input voltage V LOW-level V = ...
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NXP Semiconductors Table 7. Dynamic characteristics GND = pF; for load circuit see L Symbol Parameter Conditions 74HCT02 t propagation delay nA nY; see transition time ...
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NXP Semiconductors Test data is given in Table Definitions test circuit termination resistance should be equal to output impedance load capacitance including jig and probe capacitance. L Fig 7. Load circuitry for measuring switching ...
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NXP Semiconductors SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. ...
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NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 ...