PIC16F883-I/ML Microchip Technology Inc., PIC16F883-I/ML Datasheet - Page 197

• Manufacturer Part Number: PIC16F883-I/ML
• Description: 28 PIN, 7KB FLASH, 256 RAM, 25 I/O, QFN
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F883-I/ML

• A/d Inputs: 11-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Frequency: 20 MHz
• Input Output: 24
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin QFN
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Resistance, Drain To Source On: Bytes
• Serial Interface: MSSP or EUSART
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

13.4.5
In I
located in the lower 7 bits of the SSPADD register
(Figure 13-11). When the BRG is loaded with this
value, the BRG counts down to 0 and stops until
another reload has taken place. The BRG count is
decremented twice per instruction cycle (T
Q2 and Q4 clocks. In I
reloaded automatically. If clock arbitration is taking
place, for instance, the BRG will be reloaded when the
SCL pin is sampled high (Figure 13-12).
FIGURE 13-11:
FIGURE 13-12:
© 2008 Microchip Technology Inc.
2
C Master mode, the reload value for the BRG is
BAUD RATE GENERATOR
SDA
SCL
BRG
Value
BRG
Reload
BAUD RATE GENERATOR BLOCK DIAGRAM
BAUD RATE GENERATOR TIMING WITH CLOCK ARBITRATION
2
C Master mode, the BRG is
SSPM<3:0>
03h
SCL
DX
SCL de-asserted but slave holds
SCL low (clock arbitration)
02h
SCL is sampled high, reload takes
place and BRG starts its count
SSPM<3:0>
CY
) on the
Control
Reload
PIC16F882/883/884/886/887
01h
CLKOUT
BRG decrements on
Q2 and Q4 cycles
00h (hold off)
Reload
DX-1
BRG Down Counter
SSPADD<6:0>
SCL allowed to transition high
03h
F
OSC
02h
/4
DS41291E-page 195