MAX1587AETL Maxim Integrated Products, MAX1587AETL Datasheet - Page 20

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MAX1587AETL

Manufacturer Part Number
MAX1587AETL
Description
Other Power Management PMICs w/Dynamic Core for PDAs
Manufacturer
Maxim Integrated Products
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MAX1587AETL+T
Manufacturer:
MAXIM/美信
Quantity:
20 000
High-Efficiency, Low-I
Dynamic Core for PDAs and Smart Phones
When the input voltage is below 2.35V (typ), an under-
voltage-lockout (UVLO) circuit disables the IC. The
inputs remain high impedance while in UVLO, reducing
battery load under this condition. All serial registers are
maintained with the input voltage down to at least 2.35V.
The reset output (RSO) is low when the MR input is low
or when V7 is below 2.425V. V7 is powered from V1
(when enabled) or the backup-battery input (BKBT).
RSO normally goes low:
1) When power is first applied in configurations with no
2) When power is removed in configurations with no
3) If the backup battery falls below 2.425V when V1 is
4) When the manual reset button is pressed (MR goes
If V
RSO for 65ms after V7 rises above 2.3V. However, if V
< 2.4V when V7 exceeds 2.3V, or if V
same time, RSO deasserts immediately with no 65ms
delay. There is no delay in the second case because the
timer circuitry is deactivated to minimize operating cur-
rent during V
If it is desired to have a 65ms RSO release delay for any
sequence of V
used. An RC connected from IN to MR delays the rise of
MR until after V
either sequence of V7 and V
65ms after both are up. The only regulator output that
affects RSO is V7. RSO will not respond to V1–V6, which
are monitored by POK. Also, RSO is high impedance
and does not function if BKBT is not powered.
MR is a manual reset input for hardware reset. A low
input at MR causes the RSO output to go low for at least
65ms and also resets the V3 output to its default 1.3V set-
ting. MR impacts no other MAX1586/MAX1587 functions.
The DBI and LBI inputs monitor input power (usually a
battery) and trigger the DBO and LBO outputs. The
dead-battery comparator triggers DBO when the battery
20
separate backup battery (external diode from IN to
BKBT).
separate backup battery (external diode from IN to
BKBT).
off or out of regulation.
low).
IN
______________________________________________________________________________________
is > 2.4V, an internal timer delays the release of
Dead-Battery and Low-Battery Comparators—
IN
Undervoltage-Lockout Functions
IN
undervoltage lockout.
IN
and V7, the circuit in Figure 2 may be
powers up. The 65ms timer is valid for
Voltage Monitors, Reset, and
Reset Output (RSO) and MR Input
IN
DBI, LBI (MAX1586 Only)
and does not release until
Undervoltage Lockout
IN
and V7 rise at the
Q
IN
PMICs with
(V
factory-set 3.15V threshold is selected by connecting
DBI to IN, or the threshold can be programmed with a
resistor-divider at DBI. The low-battery comparator has
a factory-set 3.6V threshold that is selected by connect-
ing LBI to IN, or its threshold can be programmed with a
resistor-divider at LBI.
One three-resistor-divider can set both DBI and LBI
(R1, R2, and R3 in Figure 3) according to the following
equations:
1) Choose R3 to be less than 250kΩ.
Figure 3. Setting the Low-Battery and Dead-Battery Thresholds
with One Resistor Chain. The values shown set a DBI threshold
of 3.3V and an LBI threshold of 3.5V (no resistors are needed
for the factory preset thresholds).
Figure 2. An RC delay connected from IN to MR ensures that
the 65ms RSO release delay remains in effect for any
sequence of V
2
3
)
)
IN
) discharges to the dead-battery threshold. The
MAIN BATTERY
IN
R
R
1
0.22μF
438kΩ
200kΩ
2
100kΩ
and V7.
62kΩ
=
=
R1
R2
R3
R
R
3
3
V
×
LBITH
V
LB
IN
DBI (1.232V THRESHOLD)
LBI (1.00V THRESHOLD)
V
V
IN
MR
DBITH
LBITH
MAX1586
1
MAX1586
MAX1587
V
V
V
DB
LB
DBITH
V
DB
1

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