71M6543F-IGT/F Maxim Integrated Products, 71M6543F-IGT/F Datasheet - Page 100

• Manufacturer Part Number: 71M6543F-IGT/F
• Description: PMIC Solutions Precision Energy Meter IC
• Manufacturer: Maxim Integrated Products
• Type: Metering SoCr

Specifications of 71M6543F-IGT/F

• Core: 8051
• Core Architecture: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 5 KB
• Device Million Instructions Per Second: 5 MIPS
• Interface Type: I2C, ICE, SPI, UART
• Maximum Clock Frequency: 5 MHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Programmable I/os: 51
• Number Of Timers: 2
• On-chip Adc: 22 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Package / Case: LQFP-100
• Processor Series: 8051
• Program Memory Size: 64 KB
• Program Memory Type: Flash
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

71M6543F/H and 71M6543G/GH Data Sheet
Table 70
bits have a darker gray background.
100
LCD_MAP6
LCD_MAP5
LCD_MAP4
LCD_MAP3
CLOCK GENERATION
VREF TRIM FUSES
CE and ADC
LCD/DIO
TRIMT
MUX5
MUX4
MUX3
MUX2
MUX1
MUX0
CKGN
Name
RTM0
RTM0
RTM1
RTM2
RTM3
LCD0
LCD1
LCD2
CE6
CE5
CE4
CE3
CE2
CE1
CE0
lists bits and registers that may have to be accessed on a frequent basis. Reserved bits have lighter gray background, and non-volatile
Addr
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
210A
210B
210C
210D
210E
210F
2110
2111
2200
2309
2400
2401
2402
2405
2406
2407
2408
LCD_BAT
DIFF6_E
LCD_E
Bit 7
LCD_VMODE[1:0]
U
U
U
EQU[2:0]
DIFF4_E
Bit 6
U
U
U
R
MUX9_SEL[3:0]
MUX7_SEL[3:0]
MUX5_SEL[3:0]
MUX3_SEL[3:0]
MUX1_SEL[3:0]
MUX_DIV[3:0]
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Table 70: I/O RAM Map – Functional Order
LCD_MODE[2:0]
ADC_DIV
DIFF2_E
Bit 5
U
CE_LCTN[6:0] (71M6543G/GH), CE_LCTN[5:0] (71M6543F/H)
PLL_FAST
DIFF0_E
PLS_MAXWIDTH[7:0]
Bit 4
PLS_INTERVAL[7:0]
SUM_SAMPS[7:0]
LCD_MAP[55:48]
LCD_MAP[47:40]
LCD_MAP[39:32]
LCD_MAP[31:24]
U
U
TRIMT[7:0]
RTM0[7:0]
RTM1[7:0]
RTM2[7:0]
RTM3[7:0]
LCD_ALLCOM
CHOP_E[1:0]
RFLY_DIS
LCD_BLNKMAP23[5:0]
LCD_BLNKMAP22[5:0]
RESET
Bit 3
U
SUM_SAMPS[12:8]
LCD_Y
Bit 2
MUX10_SEL[3:0]
U
MUX8_SEL[3:0]
MUX6_SEL[3:0]
MUX4_SEL[3:0]
MUX2_SEL[3:0]
MUX0_SEL[3:0]
FIR_LEN[1:0]
RTM_E
MPU_DIV[2:0]
Bit 1
LCD_CLK[1:0]
RTM0[9:8]
PLS_INV
CE_E
Bit 0
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