MAX1996AETI+ Maxim Integrated Products, MAX1996AETI+ Datasheet - Page 25

• Manufacturer Part Number: MAX1996AETI+
• Description: Display Drivers CCFL Backlight Controller
• Manufacturer: Maxim Integrated Products

Specifications of MAX1996AETI+

• Lead Free Status / Rohs Status: Details

The MAX1996A also supports the receive-byte protocol
for quicker data transfers. This protocol accesses the
register configuration pointed to by the last command
byte. Immediately after power-up, the data-byte
returned by the receive-byte protocol is the contents of
the brightness register, left justified (i.e., BRIGHT4 is in
the most significant bit position of the data byte) with
the remaining bits containing a one, STATUS1, and
STATUS0. Use caution with the shorter protocols in
multimaster systems, since a second master could
overwrite the command byte without informing the first
master. During shutdown the serial interface remains
fully functional.
The 5-bit brightness register corresponds with the 5-bit
brightness code used in the dimming control (see the
Dimming Control section). BRIGHT4–BRIGHT0 =
0b00000 sets minimum brightness and BRIGHT4–
BRIGHT0 = 0b11111 sets maximum brightness. Note
that the brightness register bit assignment of command
bytes 0xA9 and 0xAA is inverted from the bit assign-
ment of command byte 0x01. The SMBus interface
Table 7. Command Byte Description
*The hexadecimal command byte shown is recommended for maximum forward compatibility with future products.
X = Don’t care.
PROTOCOL
Read Only
Read Only
Read Only
Read Only
Read and
Read and
Read and
Read and
SMBus
Write
Write
Write
Write
[BRIGHT4–BRIGHT0] (POR = 0b10111)
0b0XXX XX01
0b0XXX XX10
0b0XXX XX11
0b0XXX XX00
0b10XX XXX0
0b10XX XXX1
0b11XX XXX0
0b11XX XXX1
COMMAND
______________________________________________________________________________________
BYTE*
0xAA
0xA9
0xFE
0x01
0x02
0x03
0x04
0xFF
STATE
0x0C
0x4D
0x0C
POR
0x17
0xF9
0x00
0x40
0x40
Brightness Register
Range, CCFL Backlight Controller
ChipRev7
STATUS1 STATUS0
BRIGHT4
BRIGHT4
ChipID7
ChipID7
High-Efficiency, Wide Brightness
MfgID7
(MSB)
(MSB)
(MSB)
BIT 7
0
0
0
0
0
ChipRev6
BRIGHT3 BRIGHT2 BRIGHT1
BRIGHT3 BRIGHT2 BRIGHT1
ChipID6
ChipID6
MfgID6
BIT 6
0
0
0
1
0
ChipRev5
ChipID5
ChipID5
MfgID5
BIT 5
0
1
0
0
0
0
DATA REGISTER BIT ASSIGNMENT
does not control whether the device regulates the cur-
rent by analog dimming, DPWM dimming or both; this
is done by MINDAC (see Pin Description).
The 3-bit shutdown mode register configures the oper-
ation of the device when SH/SUS pin is toggled as
described in Table 8. The shutdown mode register can
also be used to directly shut off the CCFL regardless of
the state of SH/SUS (Table 9).
The status register returns information on fault condi-
tions. If a lamp is not connected to the secondary of the
transformer, the MAX1996A detects that the lamp cur-
rent has not exceeded the IFB detection threshold and
after 1s clears the STATUS1 bit (see the Lamp-Out
Detection section). The STATUS1 bit is latched; i.e., it
remains 0 even if the lamp-out condition goes away.
When STATUS1 = 0, the lamp is forced off. STATUS0
reports 1 as long as no overcurrent conditions are
detected. If an overcurrent condition is detected in any
given digital PWM period, STATUS0 is cleared for the
ChipRev4
BRIGHT4
ChipID4
ChipID4
MfgID4
(MSB)
BIT 4
1
0
0
0
0
[STATUS1–STATUS0] (POR = 0b11)
[SHMD2–SHMD0] (POR = 0b001)
ChipRev3
BRIGHT3 BRIGHT2 BRIGHT1
BRIGHT0
BRIGHT0
ChipID3
ChipID3
MfgID3
BIT 3
(LSB)
(LSB)
1
1
0
1
1
Shutdown Mode Register
ChipRev2
ChipID2
ChipID2
SHMD2
MfgID2
BIT 2
1
0
0
0
1
1
Status Register
ChipRev1
STATUS1
STATUS1
ChipID1
ChipID1
SHMD1
MfgID1
BIT 1
0
0
0
0
ChipRev0
BRIGHT0
STATUS0
STATUS0
ChipID0
ChipID0
SHMD0
MfgID0
(LSB)
BIT 0
(LSB)
0
0
1
0
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