MCP79510-I/MS Microchip Technology, MCP79510-I/MS Datasheet - Page 8

• Manufacturer Part Number: MCP79510-I/MS
• Description: SPI GP RTCC, 1Kb EE, 64B SRAM, ID 10 MSOP 3x3mm TUBE
• Manufacturer: Microchip Technology

MCP7952X/MCP7951X
3.0
The MCP795XX is designed to interface directly with
the Serial Peripheral Interface (SPI) port of many of
today’s popular microcontroller families, including
Microchip’s PIC
with microcontrollers that do not have a built-in SPI port
by using discrete I/O lines programmed properly in soft-
ware to match the SPI protocol.
TABLE 3-1:
3.1
The device is selected by pulling CS low. The various
8-bit
MCP795XX followed by an 8-bit address. See
Figure 3-1
After the correct instruction and address are sent, the
data stored in the memory at the selected address is
shifted out on the SO pin. Data stored in the memory at
FIGURE 3-1:
3.2
DS22300A-page 8
EEREAD
EEWRITE
EEWRDI
EEWREN
SRREAD
SRWRITE
READ
WRITE
UNLOCK
IDWRITE
IDREAD
CLRRAM
Instruction Name
SCK
CS
SO
SI
read
SPI BUS OPERATION
Read Sequence
Nonvolatile Memory Write
Sequence
for more details.
0
0
instructions
®
microcontrollers. It may also interface
1
0
INSTRUCTION SET SUMMARY
0
2
Instruction
EEREAD SEQUENCE
3
0
Instruction Format
are
0
4
0000 0011
0000 0010
0000 0100
0000 0110
0000 0101
0000 0001
0001 0011
0001 0010
0001 0100
0011 0010
0011 0011
0101 0100
transmitted
5
0
High-Impedance
6
1
1
7
A
8
7
to
A
9 10 11
6
Read data from EE memory array beginning at selected address
Write data to EE memory array beginning at selected address
Reset the write enable latch (disable write operations)
Set the write enable latch (enable write operations)
Read STATUS register
Write STATUS register
Read RTCC/SRAM array beginning at selected address
Write RTCC/SRAM data to memory array beginning at selected
address
Unlock ID Locations
Write to the ID Locations
Read the ID Locations
Clear RAM Location to ‘0’
Preliminary
the
A
Address Byte
5
A
4
12 13 14 15 16 17 18 19 20 21 22 23
A
3
The MCP795XX contains an 8-bit instruction register.
The device is accessed via the SI pin, with data being
clocked in on the rising edge of SCK. The CS pin must
be low for the entire operation.
Table 3-1
bytes and format for device operation. All instructions,
addresses, and data are transferred MSb first, LSb last.
Data (SI) is sampled on the first rising edge of SCK
after CS goes low.
the next address can be read sequentially by continu-
ing to provide clock pulses to the slave. The internal
Address Pointer automatically increments to the next
higher address after each byte of data is shifted out.
When the highest address is reached, the address
counter rolls over to the first valid address allowing the
read cycle to be continued indefinitely. The read oper-
ation is terminated by raising the CS pin
Prior to any attempt to write data to the nonvolatile
memory (EEPROM, Unique ID and STATUS register)
in the MCP795XX, the write enable latch must be set
A
2
A
1
A
contains a list of the possible instruction
0
Description
7
6
5
 2012 Microchip Technology Inc.
Data Out
4
3
2
1
(Figure
0
1-1).