ATA6621-PGQW Atmel, ATA6621-PGQW Datasheet - Page 15

• Manufacturer Part Number: ATA6621-PGQW
• Description: IC TXRX LIN BUS 5V/50MA 20QFN
• Manufacturer: Atmel
• Type: Transceiverr

Specifications of ATA6621-PGQW

• Number Of Drivers/receivers: 1/1
• Protocol: LIN
• Voltage - Supply: 5 V ~ 18 V
• Mounting Type: Surface Mount
• Package / Case: 20-QFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.19.2
4887I–AUTO–09/09
Worst Case Calculation with R
After ramping up the battery voltage V
switched on. The reset output NRES stays low for the time t
switches to high and the watchdog waits for the watchdog sequence from the microcontroller.
This lead time t
RXD switches to low. The lead time t
the first watchdog pulse from the microcontroller is required. If the trigger pulse NTRIG (or
PTRIG, as the case may be) occurs during this time, the time t
signal occurs during the time t
troller after t
signal from the microcontroller is anticipated within the time frame of t
triggering from glitches, the trigger pulse must be longer than t
restart the watchdog sequence. Should the triggering signal fail in this open window t
NRES output will be drawn to ground after t
causes NRES to immediately switch low.
Figure 3-9.
The internal oscillator has a tolerance of ±20%. This means that t
The worst case calculation for the watchdog period T
culated as follows.
The ideal watchdog time t
t
t
T
T
T
1,min
2,min
wdmax
wdmin
wd
V
CC
NTRIG
PTRIG
= 14.2 ms ±2.2 ms (±15%)
NRES
= 0.8
= 0.8
= 5V
= t
= t
1max
1min
d
t
t
= 49 ms. The times t
1
2
+ t
= 12 ms
Timing Sequence with R
t
Undervoltage Reset
= 8 ms, t
= 8.4 ms, t
reset
d
2min
WO_OSC
follows after the reset and is t
= 10 ms
= 8 ms + 8.4 ms = 16.4 ms
1,max
= 51 k
wd
2,max
is between (t
= 1.2
d
= 1.2
, a watchdog reset with t
t
d
1
= 49 ms
and t
t
d
1
follows the negative edge of this RXD signal. In this time,
t
= 12 ms
WD_OSC
2
t
2
= 12.6 ms
1
S
1
maximum) and (t
have a fixed relationship with each other. A triggering
= 10 ms
or wake up from Sleep mode, the 5V regulator is
t
2
trigg
. A triggering signal during the closed window t
= 51 k
d
t
> 3 µs
wd
= 49 ms. After wake up from Silent mode the
t
2
wd
= 10.5 ms
the microcontroller has to provide is cal-
NRES
1
minimum plus t
= 1.96 ms will reset the microcon-
1
trigg
t
1
starts immediately. If no trigger
1
reset
and t
> 3 µs. This slope serves to
2
(typically 10 ms), then it
= 10.5 ms. To avoid false
2
can also vary by ±20%.
t
ATA6621N
2
2
minimum).
Watchdog Reset
t
nres
= 1.9 ms
2
, the
15
1