W191H Cypress Semiconductor Corp, W191H Datasheet
W191H
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... Shrink Outline Package) Block Diagram SDATA SMBus Device Control SCLOCK BUF_IN Cypress Semiconductor Corporation Document #: 38-07008 Rev. *B Skew Controlled SDRAM Buffer Key Specifications Supply Voltages:...................................... V Operating Temperature: (Commercial) ............. 0°C to +70°C Operating Temperature: (Industrial) ............. –40°C to +85°C Input Threshold: .................................................. 1.5V typical Maximum Input Voltage: ...
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Pin Definitions Pin Pin Name Pin No. Type SDRAM0 11, 13, 15 BUF_IN 4 I SDATA 8 I/O SCLOCK 9 I VDDQ3 7, 12 GND Overview The W191 is ...
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Table 2. Data Bytes 0–2 Serial Configuration Map Affected Pin Bit(s) Pin No. Pin Name Data Byte 0 SDRAM Active/Inactive Register (1 = Enable Disable SDRAM2 ...
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Absolute Maximum Ratings Stresses greater than those listed in this table may cause per- manent damage to the device. These represent a stress rating Parameter Voltage on any pin with respect to GND DDQ3 IN T ...
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AC Electrical Characteristics 3.3V ± 5% (Lump Capacitance Test Load = 30pF) DDQ3 Parameter Description f Input Frequency (Commercial Input Frequency (Industrial Output Rise Edge Rate R t Output Fall Edge Rate ...
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... BUS MASTER TRANSMITTER) Figure 1. Serial Interface Bus Electrical Characteristics Ordering Information Ordering Code W191HI W191H Document #: 38-07008 Rev. *B pulse. A transitioning data line during a clock high pulse may be interpreted as a start or stop pulse (it will be interpreted as a start or stop pulse if the start/stop timing parameters are met). A write sequence is initiated by a “ ...
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SDATA SCLOCK SDATA SCLOCK Start Bit Figure 3. Serial Data Bus Start and Stop Bit Document #: 38-07008 Rev. *B Valid Change Data of Data Allowed Bit Figure 2. Serial Data Bus Valid Data Bit W191 Stop Bit Page 7 ...
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PRELIMINARY Signaling from System Core Logic Start Condition Slave Address (First Byte) LSB MSB SDATA SCLOCK SDATA Signaling by Clock Device SDATA t t ...
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... Document #: 38-07008 Rev. *B © Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...
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Document Title: W191 Skew Controlled SDRAM Buffer Document Number: 38-07008 REV. ECN NO. Issue Date ** 106267 05/11/01 *A 110162 11/17/01 *B 122714 12/17/02 Document #: 38-07008 Rev. *B Orig. of Change Description of Change IKA New Data Sheet IXL ...