MAX7314AEG+T Maxim Integrated Products, MAX7314AEG+T Datasheet - Page 10

• Manufacturer Part Number: MAX7314AEG+T
• Description: IC I/O EXPANDER I2C 16B 24QSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX7314AEG+T

• Interface: I²C
• Number Of I /o: 18
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-QSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The MAX7314 is read using the MAX7314’s internally
stored command byte as an address pointer the same
way the stored command byte is used as an address
pointer for a write. The pointer autoincrements after
each data byte is read using the same rules as for a
write (Table 2). Thus, a read is initiated by first configur-
ing the MAX7314’s command byte by performing a
write (Figure 7). The master can now read n consecu-
tive bytes from the MAX7314 with the first data byte
being read from the register addressed by the initial-
ized command byte. When performing read-after-write
verification, remember to reset the command byte’s
address because the stored command byte address
has been autoincremented after the write (Table 2). A
diagram of a read from the input ports registers is
shown in Figure 10 reflecting the states of the ports.
18-Port GPIO with LED Intensity Control,
Interrupt, and Hot-Insertion Protection
Figure 10. Read, Write, and Interrupt Timing Diagrams
10
______________________________________________________________________________________
P15– P8
P15–P8
P15–P8
P7–P0
P7–P0
P7–P0
SDA
WRITE TO OUTPUT PORTS REGISTERS (BLINK PHASE 0 REGISTERS/BLINK PHASE 1 REGISTERS)
READ FROM INPUT PORTS REGISTERS
SCL
INTERRUPT VALID/RESET
SCL
SDA
SCL
SDA
INT
S A6 A5 A4 A3 A2 A1 A0
S A6 A5 A4 A3 A2 A1 A0 1
S A6 A5 A4 A3 A2 A1 A0 1
START CONDITION
START CONDITION
START CONDITION
1
1
1
DATA1
2
2
2
SLAVE ADDRESS
SLAVE ADDRESS
3
3
SLAVE ADDRESS
3
t
DATA1
4
4
4
IV
Message Format for Reading
5
5
5
6
6
6
DATA3
DATA5
7
7
7
R/W
R/W
R/W
8
0
8
8
9
9
A
9
A
ACKNOWLEDGE FROM SLAVE
A
ACKNOWLEDGE FROM SLAVE
ACKNOWLEDGE FROM SLAVE
DATA2
MSB
MSB
0
t
t
IR
DH
0
COMMAND BYTE
COMMAND BYTE
COMMAND BYTE
t
IV
0
DATA2
DATA1
DATA2
0
DATA3
0
0
0
LSB
LSB
1
A
A
A
ACKNOWLEDGE FROM SLAVE
ACKNOWLEDGE FROM MASTER
ACKNOWLEDGE FROM MASTER
MSB
MSB
MSB
t
DS
If the MAX7314 is operated on a 2-wire interface with
multiple masters, a master reading the MAX7314 should
use a repeated start between the write, which sets the
MAX7314’s address pointer, and the read(s) that takes
the data from the location(s) (Table 2). This is because it
is possible for master 2 to take over the bus after master
1 has set up the MAX7314’s address pointer but before
master 1 has read the data. If master 2 subsequently
changes the MAX7314’s address pointer, then master
1’s delayed read can be from an unexpected location.
The command address stored in the MAX7314 circu-
lates around grouped register functions after each data
byte is written or read (Table 2).
t
IR
DATA1
DATA4
DATA6
DATA4
DATA4
DATA6
Command Address Autoincrementing
LSB
Operation with Multiple Masters
LSB
LSB
NA
NA
A
ACKNOWLEDGE FROM SLAVE
NO ACKNOWLEDGE FROM
MASTER
NO ACKNOWLEDGE FROM
MASTER
MSB
P
P
t
STOP CONDITION
STOP CONDITION
DV
DATA1 VALID
DATA2
t
DV
LSB
CONDITION
A
STOP
DATA2 VALID
P