SI3010-F-GS Silicon Laboratories Inc, SI3010-F-GS Datasheet - Page 59

• Manufacturer Part Number: SI3010-F-GS
• Description: IC ISOMODEM LINE-SIDE 16SOIC
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3010-F-GS

• Data Format: V.92
• Interface: Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Baud Rates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SEC (RVC1). Ring Validation Control 1
Reset settings = 1000_1000 (0x88)
Bit
6:4
3:1
Name
7
0
Type
Bit
RDLY[2:0]
Reserved
RCC[2:0]
RNGV
Name
RNGV
R/W
D7
Ring Validation Enable.
0 = Ring validation feature is disabled.
1 = Ring validation feature is enabled in both normal operating mode and low-
power mode.
Ring Delay.
These bits set the amount of time between when a ring signal is validated and when a
valid ring signal is indicated.
RDLY[2:0]
000
001
010
.
.
.
111
Ring Confirmation Count.
These bits set the amount of time that the ring frequency must be within the tolerances
set by the RAS[5:0] bits and the RMX[3:0] bits to be classified as a valid ring signal.
RCC[2:0]
000
001
010
011
100
101
110
111
This bit must always be written to zero.
D6
RDLY[2:0]
R/W
0 ms
1792 ms
Ring Confirmation Count Time
100
150
200
256
384
512
640
1024
D5
256 ms
512 ms
Delay
m
m
m
m
m
m
m
m
s
s
s
s
s
s
s
s
Rev. 1.0
D4
Function
D3
RCC[2:0]
R/W
D2
D1
Si2401
D0
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